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    METHODS AND APPARATUS TO SELECT A LOCATION OF EXECUTION OF A COMPUTATION
    51.
    发明申请
    METHODS AND APPARATUS TO SELECT A LOCATION OF EXECUTION OF A COMPUTATION 有权

    公开(公告)号：US20210014301A1

    公开(公告)日：2021-01-14

    申请号：US17033120

    申请日：2020-09-25

    Applicant: Intel Corporation

    Inventor： Kshitij Doshi ,  Francesc Guim Bernat ,  Ned Smith ,  Timothy Verrall ,  Uzair Qureshi

    IPC: H04L29/08

    Abstract: Methods, apparatus, systems and articles of manufacture to select a location of execution of a computation are disclosed. An example apparatus includes a cache digest interface to identify a node capable of performing a computation. A compute plan solver is to obtain a cost estimate of performing the computation from the node. Privacy weighting circuitry is to apply a privacy weighting value to the cost estimate to determine a weighted cost estimate. The compute plan solver is to select the node for performance of the computation based on the weighted cost estimate. A plan executor is to transmit a request for the selected node to perform the computation.

    Technologies for cache side channel attack detection and mitigation
    52.
    发明授权
    Technologies for cache side channel attack detection and mitigation 有权

    公开(公告)号：US10860714B2

    公开(公告)日：2020-12-08

    申请号：US16022976

    申请日：2018-06-29

    Applicant: Intel Corporation

    Inventor： John J. Browne ,  Marcel Cornu ,  Timothy Verrall ,  Tomasz Kantecki ,  Niall Power ,  Weigang Li ,  Eoin Walsh ,  Maryam Tahhan

    IPC: G06F21/55 ,  G06F21/56

    Abstract: Technologies for cache side channel attack detection and mitigation include an analytics server and one or more monitored computing devices. The analytics server polls each computing device for analytics counter data. The computing device generates the analytics counter data using a resource manager of a processor of the computing device. The analytics counter data may include last-level cache data or memory bandwidth data. The analytics server identifies suspicious core activity based on the analytics counter data and, if identified, deploys a detection process to the computing device. The computing device executes the detection process to identify suspicious application activity. If identified, the computing device may perform one or more corrective actions. Corrective actions include limiting resource usage by a suspicious process using the resource manager of the processor. The resource manager may limit cache occupancy or memory bandwidth used by the suspicious process. Other embodiments are described and claimed.

    Unifying interface for cloud content sharing services
    53.
    发明授权
    Unifying interface for cloud content sharing services 有权

    公开(公告)号：US10796012B2

    公开(公告)日：2020-10-06

    申请号：US14125504

    申请日：2013-11-06

    Applicant: Intel Corporation

    Inventor： Steven J. Birkel ,  Rita H. Wouhaybi ,  Timothy Verrall ,  Mrigank Shekhar

    IPC: G06F7/04 ,  G06F21/62 ,  G06Q50/10 ,  G06Q10/10 ,  G06F21/31

    Abstract: Methods and systems that allow a user to see the people or groups who have access to files that are maintained by a plurality of cloud content sharing services. In particular, the user may see what specific party has access to each particular file or directory, regardless of multiple cloud content sharing services involved. Moreover, a user interface and exposed application program interface allows the user to manipulate the permissions, e.g., granting access, to another person or group, to a file or directory. The user interface may also allow the user to terminate access to the file or directory for a person or group. The user's action to change a permission may be effected independently of the particular cloud content sharing service.

    TECHNOLOGIES FOR ACCELERATED ORCHESTRATION AND ATTESTATION WITH EDGE DEVICE TRUST CHAINS
    56.
    发明申请
    TECHNOLOGIES FOR ACCELERATED ORCHESTRATION AND ATTESTATION WITH EDGE DEVICE TRUST CHAINS 审中-公开

    公开(公告)号：US20190230002A1

    公开(公告)日：2019-07-25

    申请号：US16368980

    申请日：2019-03-29

    Applicant: Intel Corporation

    Inventor： Francesc Guim Bernat ,  Kapil Sood ,  Tarun Viswanathan ,  Kshitij Doshi ,  Timothy Verrall ,  Ned M. Smith ,  Manish Dave ,  Alex Vul

    IPC: H04L12/24 ,  H04L29/06

    Abstract: Technologies for accelerated orchestration and attestation include multiple edge devices. An edge appliance device performs an attestation process with each of its components to generate component certificates. The edge appliance device generates an appliance certificate that is indicative of the component certificates and a current utilization of the edge appliance device and provides the appliance certificate to a relying party. The relying party may be an edge orchestrator device. The edge orchestrator device receives a workload scheduling request with a service level agreement requirement. The edge orchestrator device verifies the appliance certificate and determines whether the service level agreement requirement is satisfied based on the appliance certificate. If satisfied, the workload is scheduled to the edge appliance device. Attestation and generation of the appliance certificate by the edge appliance device may be performed by an accelerator of the edge appliance device. Other embodiments are described and claimed.

    TECHNOLOGIES FOR PROVIDING DYNAMIC PERSISTENCE OF DATA IN EDGE COMPUTING
    57.
    发明申请
    TECHNOLOGIES FOR PROVIDING DYNAMIC PERSISTENCE OF DATA IN EDGE COMPUTING 审中-公开

    公开(公告)号：US20190138534A1

    公开(公告)日：2019-05-09

    申请号：US16235202

    申请日：2018-12-28

    Applicant: Intel Corporation

    Inventor： Francesc Guim Bernat ,  Karthik Kumar ,  Suraj Prabhakaran ,  Ramanathan Sethuraman ,  Timothy Verrall

    IPC: G06F16/27

    Abstract: Technologies for providing dynamic persistence of data in edge computing include a device including circuitry configured to determine multiple different logical domains of data storage resources for use in storing data from a client compute device at an edge of a network. Each logical domain has a different set of characteristics. The circuitry is also to configured to receive, from the client compute device, a request to persist data. The request includes a target persistence objective indicative of an objective to be satisfied in the storage of the data. Additionally, the circuitry is configured to select, as a function of the characteristics of the logical domains and the target persistence objective, a logical domain into which to persist the data and provide the data to the selected logical domain.

    TECHNOLOGIES FOR PROVIDING DYNAMIC SELECTION OF EDGE AND LOCAL ACCELERATOR RESOURCES
    58.
    发明申请
    TECHNOLOGIES FOR PROVIDING DYNAMIC SELECTION OF EDGE AND LOCAL ACCELERATOR RESOURCES 审中-公开

    公开(公告)号：US20190138361A1

    公开(公告)日：2019-05-09

    申请号：US16236196

    申请日：2018-12-28

    Applicant: Intel Corporation

    Inventor： Francesc Guim Bernat ,  Karthik Kumar ,  Ned Smith ,  Thomas Willhalm ,  Timothy Verrall

    IPC: G06F9/50 ,  G06F9/455 ,  G06F1/26

    Abstract: Technologies for providing dynamic selection of edge and local accelerator resources includes a device having circuitry to identify a function of an application to be accelerated, determine one or more properties of an accelerator resource available at the edge of a network where the device is located, and determine one or more properties of an accelerator resource available in the device. Additionally, the circuitry is to determine a set of acceleration selection factors associated with the function, wherein the acceleration factors are indicative of one or more objectives to be satisfied in the acceleration of the function. Further, the circuitry is to select, as a function of the one or more properties of the accelerator resource available at the edge, the one or more properties of the accelerator resource available in the device, and the acceleration selection factors, one or more of the accelerator resources to accelerate the function.

    Allowing varied device access based on different levels of unlocking mechanisms
    59.
    发明授权
    Allowing varied device access based on different levels of unlocking mechanisms 有权
    根据不同级别的解锁机制允许不同的设备访问

    公开(公告)号：US09578037B2

    公开(公告)日：2017-02-21

    申请号：US14951654

    申请日：2015-11-25

    Applicant: Intel Corporation

    Inventor： Keith Shippy ,  Tobias Kohlenberg ,  Mubashir Mian ,  Ned Smith ,  Omer Ben-Shalom ,  Tarun Viswanathan ,  Dennis Morgan ,  Timothy Verrall ,  Manish Dave ,  Eran Birk

    IPC: G06F17/00 ,  H04L29/06 ,  G06F21/31 ,  H04W12/06 ,  H04W88/02

    CPC classification number: H04L63/105 ,  G06F21/316 ,  G06F2221/2105 ,  G06F2221/2113 ,  H04L63/08 ,  H04L2463/082 ,  H04W12/06 ,  H04W88/02

    Abstract: Systems and methods may provide for receiving runtime input from one or more unlock interfaces of a device and selecting a level of access with regard to the device from a plurality of levels of access based on the runtime input. The selected level of access may have an associated security policy, wherein an authentication of the runtime input may be conducted based on the associated security policy. In one example, one or more cryptographic keys are used to place the device in an unlocked state with regard to the selected level of access if the authentication is successful. If the authentication is unsuccessful, on the other hand, the device may be maintained in a locked state with regard to the selected level of access.

    Abstract translation: 系统和方法可以提供用于从设备的一个或多个解锁接口接收运行时间输入，并且基于运行时间输入从多个访问级别中选择关于设备的访问级别。 所选择的访问级别可以具有相关联的安全策略，其中可以基于相关联的安全策略来执行运行时输入的认证。 在一个示例中，如果认证成功，则使用一个或多个加密密钥来将设备关于所选择的访问级别放置在解锁状态。 如果认证不成功，另一方面，相对于所选择的访问级别，设备可以保持在锁定状态。

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