APPARATUS SHIELDING ELECTRONIC MODULE FROM ELECTROMAGNETIC RADIATION
    51.
    发明申请
    APPARATUS SHIELDING ELECTRONIC MODULE FROM ELECTROMAGNETIC RADIATION 审中-公开
    电磁辐射装置屏蔽电子模块

    公开(公告)号:WO1997031514A1

    公开(公告)日:1997-08-28

    申请号:PCT/US1996019984

    申请日:1996-12-13

    Applicant: MOTOROLA INC.

    CPC classification number: H05K9/0037

    Abstract: The apparatus includes a cover (10) having a first surface (12) and a second surface opposed to the first surface (12). The second surface has an edge (16) defining a perimeter and a recessed region (18). A wall (20) is in communication with the recess region (18), the wall (20) and at least a portion of the edge (16) define a compartment (22). An electromagnetic interference-attenuating material is disposed in the compartment (22), and a fluid distributing manifold is disposed in the cover (10).

    Abstract translation: 该装置包括具有第一表面(12)和与第一表面(12)相对的第二表面的盖子(10)。 第二表面具有限定周界的边缘(16)和凹陷区域(18)。 壁(20)与凹陷区域(18)连通,壁(20)和边缘(16)的至少一部分限定隔室(22)。 电磁干扰衰减材料设置在隔室(22)中,并且流体分配歧管设置在盖(10)中。

    METHOD FOR UPDATING A SOFTWARE CODE IN A COMMUNICATION SYSTEM
    52.
    发明申请
    METHOD FOR UPDATING A SOFTWARE CODE IN A COMMUNICATION SYSTEM 审中-公开
    在通信系统中更新软件代码的方法

    公开(公告)号:WO1997030388A1

    公开(公告)日:1997-08-21

    申请号:PCT/US1997001375

    申请日:1997-01-31

    Applicant: MOTOROLA INC.

    CPC classification number: G06F8/65

    Abstract: A method of updating a software code in a cable communication system (10) involves the steps of receiving a notification (100) by a cable access unit (30). Next, the cable access unit (30) receives (110) the software code. After receiving (110) the software code the CAU (30) resets (114) and reboots using the software code.

    Abstract translation: 一种在有线通信系统(10)中更新软件代码的方法包括通过电缆接入单元(30)接收通知(100)的步骤。 接下来,电缆接入单元(30)接收(110)软件代码。 在接收(110)软件代码后,CAU(30)复位(114)并使用软件代码重新启动。

    DATA LINK CONTROL METHOD
    53.
    发明申请
    DATA LINK CONTROL METHOD 审中-公开
    数据链控制方法

    公开(公告)号:WO1997028627A1

    公开(公告)日:1997-08-07

    申请号:PCT/US1996020660

    申请日:1996-12-21

    Applicant: MOTOROLA INC.

    CPC classification number: H04L29/06 H04L69/324

    Abstract: A data link control method including receiving a message (30) for transmission over a cable communications system. The method determines a number of octets in the message (30). When the number of octets is less than or equal to a predetermined number of octets, the method sets a frame length (44) equal to the number of octets and transmits a frame (180) containing the message (30). When the number of octets is greater than the predetermined number, the messages (30) is segmented (32-42), each segment being identified in order with respect to the other segments. The method thereby provides for graceful communications resumption when the transmission of a message is interrupted before completion.

    Abstract translation: 一种数据链路控制方法,包括接收用于通过有线通信系统传输的消息(30)。 该方法确定消息(30)中的八位字节数。 当八位字节的数量小于或等于预定数量的八位字节时,该方法设置等于八位字节数的帧长度(44),并发送包含消息(30)的帧(180)。 当八位字节数大于预定数量时,消息(30)被分割(32-42),每个段相对于其他段按顺序被标识。 因此,在完成之前中断消息传输时,该方法提供了适当的通信恢复。

    METHOD AND APPARATUS FOR CONTROLLING A FRACTIONAL-N SYNTHESIZER IN A TIME DIVISION MULTIPLE ACCESS SYSTEM
    54.
    发明申请
    METHOD AND APPARATUS FOR CONTROLLING A FRACTIONAL-N SYNTHESIZER IN A TIME DIVISION MULTIPLE ACCESS SYSTEM 审中-公开
    用于控制时分多路访问系统中的分数合成器的方法和装置

    公开(公告)号:WO1997028606A1

    公开(公告)日:1997-08-07

    申请号:PCT/US1996017851

    申请日:1996-11-06

    Applicant: MOTOROLA INC.

    CPC classification number: H03L7/1974 H03L7/1976

    Abstract: In a Time Division Multiple Access System, multiple offset values are provided to a divider control circuit (213) of a fractional-N synthesizer (200) by utilizing a microprocessor (305). The microprocessor (305) utilizes timeslot information provided to it by a timeslot selector (301), frequency information provided to it by a frequency selector (303) and a read-only memory (307), to provide offset values to the divider control circuit (213).

    Abstract translation: 在时分多址系统中,利用微处理器(305)将多个偏移值提供给分数N合成器(200)的分频器控制电路(213)。 微处理器(305)利用时隙选择器(301)向其提供的时隙信息,由频率选择器(303)和只读存储器(307)向其提供的频率信息,以向偏移量控制电路 (213)。

    METHODS AND APPARATUS FOR PROCESSING BURST SIGNALS IN A TELECOMMUNICATION SYSTEM
    55.
    发明申请
    METHODS AND APPARATUS FOR PROCESSING BURST SIGNALS IN A TELECOMMUNICATION SYSTEM 审中-公开
    在电信系统中处理脉冲信号的方法和装置

    公开(公告)号:WO1997026741A1

    公开(公告)日:1997-07-24

    申请号:PCT/US1996020662

    申请日:1996-12-21

    Applicant: MOTOROLA INC.

    CPC classification number: H04L7/0334

    Abstract: A control unit (102) efficiently decodes burst signal transmissions in a TDMA-based telecommunication system (100) by decimating down the number of samples requiring processing during symbol detection. The control unit (102) includes a sampling receiver (304) that inputs burst signals from cable access units, converts them to a pair of baseband quadrature signals, I and Q. The sampling receiver (304) also includes an A/D converter (314) that samples the I and Q signals at preferably four times the symbol rate. A digital signal processor circuit (306) produces a timing error signal for substantially all of the samples. The digital processor circuit (306) also accumulates a timing error sum for each of the four samples. The processor circuit (306) selects the optimum sample as the sample between the samples having the largest positive and negative error sums. The processor circuit (306) also includes a pi /4-DQPSK differential detector that processes the optimum sample of each symbol for symbol detection.

    Abstract translation: 控制单元(102)通过在符号检测期间抽取需要处理的样本的数量来有效地解码基于TDMA的电信系统(100)中的突发信号传输。 控制单元(102)包括从电缆接入单元输入突发信号的采样接收器(304),将它们转换成一对基带正交信号I和Q.采样接收器(304)还包括A / D转换器 314),其优选地采用符号率的四倍的I和Q信号。 数字信号处理器电路(306)产生基本上所有样本的定时误差信号。 数字处理器电路(306)还累积了四个样本中的每一个的定时误差和。 处理器电路(306)选择最佳采样作为具有最大正和负误差和的采样之间的采样。 处理器电路(306)还包括处理用于符号检测的每个符号的最佳采样的pi / 4-DQPSK差分检测器。

    METHOD AND SYSTEM FOR COMMUNICATION OVER MULTIPLE CHANNELS IN A SPREAD SPECTRUM COMMUNICATION SYSTEM
    56.
    发明申请
    METHOD AND SYSTEM FOR COMMUNICATION OVER MULTIPLE CHANNELS IN A SPREAD SPECTRUM COMMUNICATION SYSTEM 审中-公开
    传播频谱通信系统中多通道通信的方法和系统

    公开(公告)号:WO1997026726A1

    公开(公告)日:1997-07-24

    申请号:PCT/US1996019016

    申请日:1996-11-26

    Applicant: MOTOROLA INC.

    Abstract: A method for transmitting a communication signal (20) having a data rate over a plurality of spread spectrum traffic channels includes determining a first number of traffic channels required to transmit the communication signal at the data rate, and determining a second number of traffic channels (502) available for transmitting the communication signal (20). In response to a comparison of the first number of traffic to the second number of traffic channels, a first traffic channel (54) for transmitting a first portion of the communication signal (50, 51) and a second traffic channel (56) for transmitting a second portion of the communication signal (52, 53) are selected from the second number of traffic channels (502). The selection of the first traffic channel (54) is non deterministic of the selection of the second traffic channel (56).

    Abstract translation: 一种用于在多个扩频业务信道上发送具有数据速率的通信信号(20)的方法包括确定以数据速率发送通信信号所需的第一数量的业务信道,以及确定第二数量的业务信道( 502),可用于发送通信信号(20)。 响应于第一数量的业务与第二数量的业务信道的比较,用于发送通信信号(50,51)的第一部分的第一业务信道(54)和用于发送的第二业务信道(56) 从第二数量的业务信道(502)中选择通信信号(52,53)的第二部分。 第一业务信道(54)的选择对于第二业务信道(56)的选择是不确定的。

    METHOD AND APPARATUS FOR DECODING AN ENCODED SIGNAL
    57.
    发明申请
    METHOD AND APPARATUS FOR DECODING AN ENCODED SIGNAL 审中-公开
    用于解码编码信号的方法和装置

    公开(公告)号:WO1997024850A1

    公开(公告)日:1997-07-10

    申请号:PCT/US1996016141

    申请日:1996-10-09

    Applicant: MOTOROLA INC.

    CPC classification number: H04L1/0059 H04L25/03178 H04L27/10 H04L27/103

    Abstract: A decoder (215) implemented in a receiver of a wireless communication system employs an improved method and apparatus for decoding an encoded signal. The receiver sums the energy values (156A, 156B, ...156N) from a plurality of fingers within to produce an aggregate energy value (166). From the aggregate energy value (166), a set of log-likelihood values (207) are generated with a non-linear function generator (205) before being deinterleaved by a deinterleaver (210). The deinterleaved values (213) are input to the decoder (215) which estimates the original signal (178) by incorporating path histories of bits in the estimation of subsequent, related bits. Use of the path histories of bits improves the estimates of the original signal (178), which translates into an increase in the sensitivity of the receiver.

    Abstract translation: 在无线通信系统的接收机中实现的解码器(215)采用改进的编码信号解码方法和装置。 接收器从多个指状物中加入能量值(156A,156B,... 156N)以产生总能量值(166)。 从聚合能量值(166),在由解交织器(210)解交织之前,用非线性函数发生器(205)生成一组对数似然值(207)。 解交织值(213)被输入到解码器(215),解码器(215)通过在随后相关比特的估计中并入比特的路径历史来估计原始信号(178)。 使用比特的路径历史改进了原始信号(178)的估计,这转化为接收机的灵敏度的增加。

    ELECTRODE MATERIAL FOR ELECTROCHEMICAL LITHIUM INTERCALATION
    58.
    发明申请
    ELECTRODE MATERIAL FOR ELECTROCHEMICAL LITHIUM INTERCALATION 审中-公开
    电化学锂离子电极用电极材料

    公开(公告)号:WO1997024773A1

    公开(公告)日:1997-07-10

    申请号:PCT/US1996020765

    申请日:1996-12-16

    Applicant: MOTOROLA INC.

    CPC classification number: H01M4/525 H01M4/131 H01M10/052

    Abstract: An electrode material for use in a lithium intercalation electrochemical cell. The electrode material is an Li2NiO2 material which may be used either alone, or in combination with conventional lithiated transition metal oxide materials. The electrode material provides a reservoir or excess pool of lithium ions adapted to overcome the irreversible capacity loss typically experienced in current lithium ion batteries.

    Abstract translation: 一种用于锂嵌入电化学电池的电极材料。 电极材料是Li2NiO2材料,其可以单独使用或与常规的锂化过渡金属氧化物材料组合使用。 电极材料提供了适于克服当前锂离子电池中通常经历的不可逆容量损失的储存器或多余的锂离子池。

    MEMORY BYPASS METHOD AND SYSTEM IN A COMPUTING ELEMENT IN A COMPUTATIONAL ARRAY
    59.
    发明申请
    MEMORY BYPASS METHOD AND SYSTEM IN A COMPUTING ELEMENT IN A COMPUTATIONAL ARRAY 审中-公开
    计算单元中计算单元中的记忆旁路方法和系统

    公开(公告)号:WO1997024673A1

    公开(公告)日:1997-07-10

    申请号:PCT/US1996017108

    申请日:1996-10-23

    Inventor: MOTOROLA INC.

    CPC classification number: G06F15/8015 G06F9/3824

    Abstract: A computing element (200) in a computational array includes a memory bypass system which performs in a single clock cycle a calculation that requires the result of a previous calculation performed in a previous clock cycle. The computing element has a computational unit (210) which performs calculations and a result memory (240) which stores the results of the calculations. The memory bypass method and system bypasses the result memory (240) when it determines that the result of a calculation is needed as an input to the next calculation to be performed, and provides the result of the calculation directly to the computational unit (210) to perform the next calculation. Otherwise, when the result is not needed as the input in the next calculation, the memory bypass method and system reads the input for the next calculation from the result memory (240).

    Abstract translation: 计算阵列中的计算元件(200)包括存储器旁路系统,其在单个时钟周期中执行需要在先前时钟周期中进行的先前计算的结果的计算。 计算元件具有执行计算的计算单元(210)和存储计算结果的结果存储器(240)。 当存储器旁路方法和系统确定需要计算结果作为要执行的下一个计算的输入时,绕过结果存储器(240),并将计算结果直接提供给计算单元(210) 执行下一次计算。 否则,当不需要结果作为下一次计算中的输入时,存储器旁路方法和系统从结果存储器(240)读取下次计算的输入。

    REUSABLE HOUSING AND MEMORY CARD THEREFOR
    60.
    发明申请
    REUSABLE HOUSING AND MEMORY CARD THEREFOR 审中-公开
    可重复使用的住房和存储卡

    公开(公告)号:WO1997023819A1

    公开(公告)日:1997-07-03

    申请号:PCT/US1996019951

    申请日:1996-12-13

    Applicant: MOTOROLA INC.

    CPC classification number: G06F15/0283 Y10S345/901

    Abstract: A reusable housing (700) receives a memory card (702) containing a machine-readable storage medium (714) to interface with a device (704) having a PC card interface (706) within a PC card slot (710). The memory card (702) has a plurality of connection points (716) for externally accessing the machine-readable storage medium (714). The reusable housing (700) includes a housing member (720) which removably receives and retains the memory card (702). A PC card connector (722) is positioned on the housing member (720) to interface with the PC card interface (706) when the housing member (720) is inserted in the PC card slot (710). The reusable housing (700) further includes an interface (724) which connects the plurality of connection points (716) to the PC card connector (722) to facilitate communication between the machine-readable storage medium (714) and the PC card interface (706).

    Abstract translation: 可重复使用的壳体(700)接收包含机器可读存储介质(714)的存储卡(702),以与具有在PC卡槽(710)内的PC卡接口(706)的设备(704)接口。 存储卡(702)具有用于外部访问机器可读存储介质(714)的多个连接点(716)。 可重复使用的壳体(700)包括可移除地接收和保持存储卡(702)的壳体构件(720)。 当壳体构件(720)插入PC卡槽(710)中时,PC卡连接器(722)定位在壳体构件(720)上以与PC卡接口(706)接合。 可重复使用的壳体(700)还包括将多个连接点(716)连接到PC卡连接器(722)的接口(724),以便于机器可读存储介质(714)和PC卡接口 706)。

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