公开(公告)号：DE69736347T2

公开(公告)日：2007-07-12

申请号：DE69736347

申请日：1997-05-09

Applicant: ST MICROELECTRONICS SRL

Inventor： MANCUSO MASSIMO ,  D ALTO VIVIANA ,  POLUZZI RINALDO ,  AIROLDI FABRIZIO

IPC: H04N1/40 ,  H04N5/225 ,  H04N5/91 ,  H04N5/92

Abstract: Digital photography apparatus (100), particularly a digital still camera, comprising means (110-125) for acquiring a digital image, compression means (130) for obtaining a compressed image, and a memory (135) for storing the compressed image, the apparatus also including processing means (140) for obtaining a processed image and corresponding processing parameters from the image acquired, the processing means (140) supplying as an output, in a first operative condition, the processed image to be compressed by the compression means (130) and, in a second operative condition, the image acquired to be compressed by the compression means (130) and the processing parameters to be stored in the memory (135).

公开(公告)号：DE69421377T2

公开(公告)日：2000-03-23

申请号：DE69421377

申请日：1994-02-28

Applicant: ST MICROELECTRONICS SRL

Inventor： MANCUSO MASSIMO ,  POLUZZI RINALDO ,  RIZZOTTO GIANGUIDO

IPC: H04N5/21 ,  G06T5/20 ,  H03H21/00 ,  H04N1/409

Abstract: Filter achieving noise reduction and digital signal image edge exaltation comprising first and second noise reduction circuit means 2 and 3 designed to elect an image edge. Said first and second noise reduction circuit means 2 and 3 comprise each a first and second comparison element (S1,S2,S3,S4) whose input terminals are designed to receive separate digital signals of an image and an inferential circuit (C1,C2) connected to said comparison elements. Each inferential circuit (C1,C2) comprises a fuzzy logic unit designed to define activation levels (Vi) dependent upon signals generated by the comparison elements. The filter (1) comprises also a noise detection circuit (4) and an image edge detection circuit (6) both connected to the noise reduction circuit means (2,3) and designed to perform operations in accordance with fuzzy logic rules on the basis of activation levels (Vi) defined in the inferential circuits (C1,C2). The filter 1 also includes a noise reduction circuit (5) connected to the noise detection circuit (6) and designed to filter the digital image signals on the basis of the operations performed by the circuit (4). In the filter (1) is also included an image edge exalting circuit (7) connected to the noise reduction circuit (5) and to the image edge detection circuit (4) designed to perform on filtered digital image signals an image edge exaltation on the basis of the operations performed by the image edge detection circuit (6).