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公开(公告)号：JPH0974355A
公开(公告)日：1997-03-18
申请号：JP22947195
申请日：1995-09-06
Applicant: YAMAHA CORP
Inventor： MAEJIMA TOSHIO
Abstract: PROBLEM TO BE SOLVED: To process the analog signals of plural channels without extending a circuit scale. SOLUTION: An integrating means 11 successively executes integration processing corresponding to respective channels. Integrated value storage means 12, 12... receive integrated value signals showing the results of integrating processing corresponding to the respective channels through a switch means 15 and store them for each channel. A quantizing means 13 quantizes the results of integrating processing corresponding to the respective channels and successively outputs digital signals corresponding to the respective channels, and an inverse quantizing means 14 converts these digital signals to feedback analog signals. The switch means 15 successively supplies the input analog signals corresponding to the respective channels, the integrated value signals stored in the integrated value storage means 12 and the feedback analog signals to the integrating means and the integrated value signals provided as a result are successively supplied to the integrated value storage means 12.
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公开(公告)号：JP2013236208A
公开(公告)日：2013-11-21
申请号：JP2012106596
申请日：2012-05-08
Applicant: Yamaha Corp , ヤマハ株式会社
Inventor： OTANI YOHEI , TSUJI NOBUAKI , MAEJIMA TOSHIO
Abstract: PROBLEM TO BE SOLVED: To provide a class D power amplifier for driving a speaker by an SEPP method which reduces noise generated immediately after power is supplied.SOLUTION: The class D power amplifier includes: an integrator 4 for integrating a differential signal between an input signal and a feedback signal; a comparator 7 for comparing the integrated signal with a carrier signal Ws for conversion to a pulse width modulation signal; a drive circuit 8 having FETs 9, 10 connected in series between a ground potential Gnd and a supply voltage Vdd; a positive terminal 14 for outputting an amplified signal via a capacitor 13; a resistance 16 for feeding back a part of the amplified signal as a feedback signal; a switch Sw5 connected at one end to a supply line of the voltage Vdd and connected at the other end to a supply path of the input signal; and a control circuit 21 for controlling the switch Sw5 such that an off period per unit time lengthens gradually with time after power is supplied.
Abstract translation: 要解决的问题：提供一种用于通过SEPP方法驱动扬声器的D类功率放大器，其减少了在供电之后立即产生的噪声。解决方案：D类功率放大器包括：积分器4，用于将输入 信号和反馈信号; 比较器7，用于将积分信号与用于转换的脉冲宽度调制信号的载波信号Ws进行比较; 具有串联连接在地电位Gnd和电源电压Vdd之间的FET9,10的驱动电路8; 用于经由电容器13输出放大信号的正端子14; 用于反馈一部分放大信号作为反馈信号的电阻16; 开关Sw5一端连接到电压Vdd的电源线，并在另一端连接到输入信号的供电路径; 以及用于控制开关Sw5的控制电路21，使得每单位时间的关闭时段在供电之后随时间逐渐延长。
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公开(公告)号：JP2011066559A
公开(公告)日：2011-03-31
申请号：JP2009213808
申请日：2009-09-15
Applicant: Yamaha Corp , ヤマハ株式会社
Inventor： KISHII TATSUYA , MAEJIMA TOSHIO , TSUCHIYA HIROTOSHI , NAKAMURA KATSUYOSHI , MIYAZAKI MASAHITO , HIMENO AKIHISA
Abstract: PROBLEM TO BE SOLVED: To provide a class-D amplifier capable of performing dynamic range compression with a simple configuration without requiring an external circuit such as a variable resistor. SOLUTION: An error integrator 110 integrates an error between an input signal and a feedback signal and outputs an integral value signal indicating an integral value. A pulse-width modulating circuit 130 outputs a digital signal having pulse width corresponding to the level of the integral value signal. An output buffer 150 drives a load based upon a digital signal output from the pulse-width modulating circuit 130. An output signal of the output buffer 150 is fed back to the error integrator 110. A compression characteristic control section 330 generates a compression characteristic control signal generated by multiplying a peak of Vin by a gain corresponding to a specified compression ratio, and adding a specified threshold. An attenuation instruction generating section 380 outputs an attenuation instruction pulse SW once the level of the output signal of the output buffer 150 exceeds the level of the compression characteristic control signal. COPYRIGHT: (C)2011,JPO&INPIT
Abstract translation: 要解决的问题：提供能够以简单的配置执行动态范围压缩的D类放大器，而不需要诸如可变电阻器的外部电路。 解决方案：误差积分器110对输入信号和反馈信号之间的误差进行积分，并输出表示积分值的积分值信号。 脉冲宽度调制电路130输出具有与积分值信号的电平对应的脉冲宽度的数字信号。 输出缓冲器150基于从脉冲宽度调制电路130输出的数字信号来驱动负载。输出缓冲器150的输出信号被反馈到误差积分器110.压缩特性控制部分330产生压缩特性控制 通过将Vin的峰值乘以与指定压缩比相对应的增益而生成的信号，并且添加指定的阈值。 一旦输出缓冲器150的输出信号的电平超过压缩特性控制信号的电平，衰减指令产生部件380输出衰减指令脉冲SW。 版权所有（C）2011，JPO＆INPIT
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公开(公告)号：JP2011019285A
公开(公告)日：2011-01-27
申请号：JP2010239012
申请日：2010-10-25
Applicant: Yamaha Corp , ヤマハ株式会社
Inventor： MAEJIMA TOSHIO
IPC: H03F3/217
Abstract: PROBLEM TO BE SOLVED: To provide a class-D amplifier which reduces a component of direct current voltage in an output, nearly to zero volt, without using a transformer, and has a low distortion and a low loss of electric power.SOLUTION: The class-D amplifier has: an operational amplifier 11 and capacitors C1, C2, which constitute an integrator for integrating a difference between a plus side input signal and minus side input signal as an analogue input signal; delay circuits 21, 22 which delay a phase of a chopping wave by a desired minor angle; resistors R5, R6, R7, R8, R9, R10, R11, and R12 forming a composite circuit which composes an output of the integrator, the chopping wave, and the output of the delay circuits 21, 22; comparators 12, 13 which compare the outputs of the composite circuit each other; AND circuits 31, 32 which constitute a buffer with outputs of the comparators 12, 13 as an input; and resistors R3, R4 which feedback the outputs of the buffer to an input side of the integrator.
Abstract translation: 要解决的问题：提供一种D类放大器，其在不使用变压器的情况下将输出中的直流电压的分量降低到接近零伏，并且具有低失真和低功率损耗。解决方案： D类放大器具有：运算放大器11和电容器C1，C2，它们构成用于积分正侧输入信号和负侧输入信号之差作为模拟输入信号的积分器; 延迟电路21,22，其将斩波的相位延迟期望的小角度; 形成构成积分器的输出，斩波和延迟电路21,22的输出的复合电路的电阻R5，R6，R7，R8，R9，R10，R11和R12; 比较器12,13将复合电路的输出进行比较; AND电路31,32构成作为输入的比较器12,13的输出的缓冲器; 以及将缓冲器的输出反馈到积分器的输入侧的电阻器R3，R4。
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公开(公告)号：JP2010187399A
公开(公告)日：2010-08-26
申请号：JP2010099207
申请日：2010-04-22
Applicant: Yamaha Corp , ヤマハ株式会社
Inventor： MAEJIMA TOSHIO
IPC: H03F3/217
Abstract: PROBLEM TO BE SOLVED: To provide a class-D amplifier capable of preventing the occurrence of clipping without generating nonlinear distortion.
SOLUTION: An amplifier 100 outputs digital signals VOp and VOn which are pulsewidth-modulated in accordance with an input analog signal. An input section of the amplifier 100 has a switch 130 which attenuates the input analog signal by giving an attenuation command signal SW thereto. A clip prevention controller 200 generates the attenuation command signal to cyclically and intermittently attenuate the input analog signal by detecting that the digital signal is brought into a clip state or a near-clip state, on the basis of the level of a signal within the amplifier 100.
COPYRIGHT: (C)2010,JPO&INPITAbstract translation: 要解决的问题：提供能够防止在不产生非线性失真的情况下发生限幅的D类放大器。 解决方案：放大器100输出根据输入的模拟信号进行脉冲宽度调制的数字信号VOp和VOn。 放大器100的输入部分具有开关130，该开关通过向其提供衰减命令信号SW来衰减输入的模拟信号。 剪辑防止控制器200基于放大器内的信号电平，通过检测数字信号进入剪辑状态或近剪辑状态来生成衰减命令信号，以循环地和间歇地衰减输入的模拟信号 （C）2010，JPO＆INPIT
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Patent Agency Ranking
公开(公告)号：JP2007228572A
公开(公告)日：2007-09-06
申请号：JP2007017927
申请日：2007-01-29
Applicant: Yamaha Corp , ヤマハ株式会社
Inventor： MAEJIMA TOSHIO
IPC: H03F3/217
Abstract: PROBLEM TO BE SOLVED: To reduce the chip area of a bridge-connected amplifier which amplifies analog signal or digital signal. SOLUTION: PWM Signals with the different polarities which are input from a +IN terminal and a -IN terminal are output to a predriver 1 and to a switching signal generating circuit 2. The predriver 1 generates a gate signal driving a driver 4 from the input PWM signal and outputs the gate signal to switches SW1 and SW2. The switching signal generating circuit 2, however, inputs the PWM signal and outputs switching signals S1 and S2. A switching circuit 3 once inputting the switching signals S1 and S2 switches SW1 to SW6 to output the gate signal to a P-channel MOS transistor MP1 and an N-channel MOS transistor MN1 when the PWM signal is input from the +IN side and to a P-channel MOS transistor MP2 and an N-channel MOS transistor MN2, when the PWM signal is input from the -IN side. COPYRIGHT: (C)2007,JPO&INPIT
Abstract translation: 要解决的问题：减少放大模拟信号或数字信号的桥接放大器的芯片面积。 解决方案：从+ IN端子和-IN端子输入的具有不同极性的PWM信号输出到预驱动器1和切换信号发生电路2.预驱动器1产生驱动驱动器4的栅极信号 从输入PWM信号输出门信号至开关SW1和SW2。 然而，开关信号发生电路2输入PWM信号并输出开关信号S1和S2。 一旦输入开关信号S1和S2的开关电路3，当从+ IN侧输入PWM信号时，开关SW1至SW6将栅极信号输出到P沟道MOS晶体管MP1和N沟道MOS晶体管MN1，并且 当从-IN侧输入PWM信号时，P沟道MOS晶体管MP2和N沟道MOS晶体管MN2。 版权所有（C）2007，JPO＆INPIT
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公开(公告)号：JP2007124625A
公开(公告)日：2007-05-17
申请号：JP2006226272
申请日：2006-08-23
Applicant: Yamaha Corp , ヤマハ株式会社
Inventor： IWAMATSU MASAYUKI , MAEJIMA TOSHIO
Abstract: PROBLEM TO BE SOLVED: To provide a class-D amplifier for amplifying an input signal in a status that deviation is small, and for obtaining an output signal in a proper level all over the whole dynamic range of an input signal.
SOLUTION: An amplifier 100 outputs digital signals VOp and VOn pulse width-modulated according to an input signal. The input part of the amplifier 100 is provided with a switch 130 as an attenuation means. This switch 130 and a clip prevention control part 200 are configured to play a role as a gain control means for decreasing the whole gain of the amplifier 100 according to the increase of the level of the input signal VIp and VIn in order to maintain the peak level of a waveform shown by the digital signal VOp or VOn in a fixed level when the digital signal VOp or VOn is turned into a clip or its close status.
COPYRIGHT: (C)2007,JPO&INPITAbstract translation: 要解决的问题：提供一种用于在偏差较小的状态下放大输入信号的D类放大器，并且用于在输入信号的整个动态范围的整个动态范围内获得适当电平的输出信号。 解决方案：放大器100输出根据输入信号进行脉宽调制的数字信号VOp和VOn。 放大器100的输入部分设置有作为衰减装置的开关130。 该开关130和剪辑防止控制部200被配置为起到增益控制装置的作用，用于根据输入信号VIp和VIn的电平的增加来减小放大器100的整体增益，以便保持峰值 当数字信号VOp或VOn变为剪辑或其关闭状态时，由数字信号VOp或VOn所示的波形的电平处于固定电平。 版权所有（C）2007，JPO＆INPIT
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公开(公告)号：JP2007043591A
公开(公告)日：2007-02-15
申请号：JP2005227448
申请日：2005-08-05
Applicant: Yamaha Corp , ヤマハ株式会社
Inventor： MAEJIMA TOSHIO
IPC: H03K17/16 , H03K17/695 , H03K19/0175
Abstract: PROBLEM TO BE SOLVED: To prevent an output signal from generating an overshoot and an undershoot when an inductive load is driven. SOLUTION: In a process that a P channel pre-driver 1 or a N channel pre-driver 2 drives so as to transfer a P channel transistor MP1 or a N channel transistor MN1 from an ON state to an OFF state, when an output signal Vout changes due to a counter-electromotive force generated during applying the inductive load and exceeds a threshold value level of an invertor X8, a control to reduce a gain of the P channel pre-driver 1 or the N channel pre-driver 2 is conducted. COPYRIGHT: (C)2007,JPO&INPIT
Abstract translation: 要解决的问题：为了防止在感应负载被驱动时输出信号产生过冲和下冲。 解决方案：在P通道预驱动器1或N通道预驱动器2驱动以将P沟道晶体管MP1或N沟道晶体管MN1从导通状态传送到OFF状态的过程中，当 输出信号Vout由于在施加电感负载时产生的反电动势而变化，并且超过反相器X8的阈值电平，减小P通道预驱动器1或N通道预驱动器的增益的控制 2进行。 版权所有（C）2007，JPO＆INPIT
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公开(公告)号：JP2004179814A
公开(公告)日：2004-06-24
申请号：JP2002341675
申请日：2002-11-26
Applicant: Yamaha Corp , ヤマハ株式会社
Inventor： MAEJIMA TOSHIO
Abstract: PROBLEM TO BE SOLVED: To provide an AGC circuit having a wide control range even when the circuit is driven at a low power supply voltage and to provide a differential amplifier circuit (including a comparator circuit) suitably used for the AGC circuit.
SOLUTION: The AGC circuit includes: a comparator circuit 200 for comparing an output voltage with a reference voltage; a charge pump circuit 84 the operating state of which is switched on the basis of an output of the comparator circuit; averaging circuits (64, 47) for averaging a high voltage output of the charge pump circuit in terms of time; and an amplifier circuit whose amplification factor is varied with a third element 70 the impedance of which is increased / decreased with an output of the averaging circuits.
COPYRIGHT: (C)2004,JPO-
公开(公告)号：JP2004128750A
公开(公告)日：2004-04-22
申请号：JP2002288028
申请日：2002-09-30
Applicant: Yamaha Corp , ヤマハ株式会社
Inventor： MAEJIMA TOSHIO
IPC: H03F3/217
Abstract: PROBLEM TO BE SOLVED: To provide an inexpensive PWM amplifier with a simple circuit constitution.
SOLUTION: The PWM amplifier is provided with a PWM modulation circuit to modulate digital audio data to PWM signals and a drive circuit to power-amplify the PWM signals. The PWM modulation circuit is provided with an integral circuit to directly input one-bit digital audio data, and a comparison circuit to output the PWM signals by comparing the output signals of the integral circuit and reference triangular wave signals. As a result, the inexpensive PWM amplifier can be provided by reducing circuits.
COPYRIGHT: (C)2004,JPO
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