公开(公告)号：AT521133T

公开(公告)日：2011-09-15

申请号：AT06020327

申请日：2006-09-27

Applicant: YAMAHA CORP

Inventor： MAEJIMA TOSHIO ,  IWAMATSU MASAYUKI

IPC: H03F3/217

Abstract: A class D amplifier includes: an amplifier that generates a digital signal for driving a load based on an input signal; an attenuator that attenuates the input signal according to an attenuation command signal; and a clip prevention controller that outputs the attenuation command signal to intermittently attenuate the input signal when the digital signal is brought into a clip state or a near-clip state.

公开(公告)号：DE69530737D1

公开(公告)日：2003-06-18

申请号：DE69530737

申请日：1995-09-29

Applicant: YAMAHA CORP

Inventor： NORO MASAO ,  YAMAMOTO YUSUKE ,  MAEJIMA TOSHIO

IPC: H03M3/02

公开(公告)号：DE69530737T2

公开(公告)日：2004-04-08

申请号：DE69530737

申请日：1995-09-29

Applicant: YAMAHA CORP

Inventor： NORO MASAO ,  YAMAMOTO YUSUKE ,  MAEJIMA TOSHIO

IPC: H03M3/02

公开(公告)号：HK1051266A1

公开(公告)日：2003-07-25

申请号：HK03103310

申请日：2003-05-13

Applicant: YAMAHA CORP

Inventor： TODA AKIHIKO ,  MAEJIMA TOSHIO ,  NORO MASAO

IPC: H03M1/68 ,  H03M1/74 ,  H03M1/76 ,  H03M

Abstract: A resistor string D/A converter for converting input data to multiple-bit data without increasing the number of resistors. The higher four bits of input data to be converted are supplied to a decoder (1) while the lower four bits are applied to a decoder (3) through an inverter (2). The decoder (1) decodes the higher four bits and turns on one of FETs (F0-F15) based on the decoded result. As a result, one of the voltages at the nodes between series resistors (r0-r15) is selected and applied to an operational amplifier (6). Similarly, the voltage corresponding to the lower four bits of the data is applied to an operational amplifier (7). The output from the operational amplifier (7) is divided by 16 through resistors (ra, rb), and the resulting voltage is combined with the voltage applied to the operational amplifier (6) to produce an analog voltage corresponding to the input data.

公开(公告)号：DE60045802D1

公开(公告)日：2011-05-12

申请号：DE60045802

申请日：2000-12-01

Applicant: YAMAHA CORP

Inventor： MAEJIMA TOSHIO

IPC: H03F3/45 ,  H03F3/30

公开(公告)号：DE69635505D1

公开(公告)日：2006-01-05

申请号：DE69635505

申请日：1996-09-06

Applicant: YAMAHA CORP

Inventor： MAEJIMA TOSHIO

IPC: H03M1/12 ,  H03M3/00

Abstract: An analog/digital converter where input analog signals are successively converted into digital signals under a time sharing control system; the analog/digital converter includes an integrating portion, a plurality of integrated calculus memory portions, a signal digitalizing portion, a feedback analog signal generating portion, and a switching portion. According to the analog/digital converter of the present invention, input analog signals for a plurality of channels or input analog signals for highly-ordered integrating processes can be converted into digital signals without making the size of the circuit large.

公开(公告)号：HK1051263A1

公开(公告)日：2003-07-25

申请号：HK03103282

申请日：2003-05-10

Applicant: YAMAHA CORP

Inventor： MAEJIMA TOSHIO

IPC: H03F3/30 ,  H03F3/45 ,  H03F

Abstract: A differential amplifier circuit of the present invention comprises an input circuit 10 for producing a difference voltage signal between a positive input signal and a negative input signal, a feedback bias circuit 20 for inputting the difference voltage signal supplied from the input circuit 10 to provide a bias voltage corresponding to the difference voltage signal and for performing a feedback control on the bias voltage by feeding back an output current, an output circuit 30 for supplying a load with the output current corresponding to the bias voltage, and a current detection circuit 40 for detecting the output current to provide it to the feedback bias circuit 20. The differential amplifier circuit performs class-AB amplification in such a way that the bias voltage provides a current value close to zero when the difference voltage signal is substantially zero.

公开(公告)号：AU1549201A

公开(公告)日：2001-06-12

申请号：AU1549201

申请日：2000-11-22

Applicant: YAMAHA CORP

Inventor： TODA AKIHIKO ,  MAEJIMA TOSHIO ,  NORO MASAO

IPC: H03M1/68 ,  H03M1/74 ,  H03M1/76

Abstract: A resistor string D/A converter for converting input data to multiple-bit data without increasing the number of resistors. The higher four bits of input data to be converted are supplied to a decoder (1) while the lower four bits are applied to a decoder (3) through an inverter (2). The decoder (1) decodes the higher four bits and turns on one of FETs (F0-F15) based on the decoded result. As a result, one of the voltages at the nodes between series resistors (r0-r15) is selected and applied to an operational amplifier (6). Similarly, the voltage corresponding to the lower four bits of the data is applied to an operational amplifier (7). The output from the operational amplifier (7) is divided by 16 through resistors (ra, rb), and the resulting voltage is combined with the voltage applied to the operational amplifier (6) to produce an analog voltage corresponding to the input data.

公开(公告)号：DE69635505T2

公开(公告)日：2006-08-10

申请号：DE69635505

申请日：1996-09-06

Applicant: YAMAHA CORP

Inventor： MAEJIMA TOSHIO

IPC: H03M1/12 ,  H03M3/00

Abstract: An analog/digital converter where input analog signals are successively converted into digital signals under a time sharing control system; the analog/digital converter includes an integrating portion, a plurality of integrated calculus memory portions, a signal digitalizing portion, a feedback analog signal generating portion, and a switching portion. According to the analog/digital converter of the present invention, input analog signals for a plurality of channels or input analog signals for highly-ordered integrating processes can be converted into digital signals without making the size of the circuit large.

公开(公告)号：AU1556501A

公开(公告)日：2001-06-12

申请号：AU1556501

申请日：2000-12-01

Applicant: YAMAHA CORP

Inventor： MAEJIMA TOSHIO

IPC: H03F3/30 ,  H03F3/45

Abstract: A differential amplifier circuit of the present invention comprises an input circuit 10 for producing a difference voltage signal between a positive input signal and a negative input signal, a feedback bias circuit 20 for inputting the difference voltage signal supplied from the input circuit 10 to provide a bias voltage corresponding to the difference voltage signal and for performing a feedback control on the bias voltage by feeding back an output current, an output circuit 30 for supplying a load with the output current corresponding to the bias voltage, and a current detection circuit 40 for detecting the output current to provide it to the feedback bias circuit 20. The differential amplifier circuit performs class-AB amplification in such a way that the bias voltage provides a current value close to zero when the difference voltage signal is substantially zero.