公开(公告)号：US08941147B2

公开(公告)日：2015-01-27

申请号：US13660497

申请日：2012-10-25

Applicant: International Business Machines Corporation

Inventor： Cheng-Wei Cheng ,  Shu-Jen Han ,  Masaharu Kobayashi ,  Ko-Tao Lee ,  Devendra K. Sadana ,  Kuen-Ting Shiu

IPC: H01L29/66

CPC classification number: H01L24/89 ,  H01L21/02381 ,  H01L21/02389 ,  H01L21/6835 ,  H01L24/03 ,  H01L24/05 ,  H01L24/08 ,  H01L24/80 ,  H01L24/92 ,  H01L29/78603 ,  H01L29/78681 ,  H01L2221/68363 ,  H01L2221/68377 ,  H01L2221/68381 ,  H01L2224/0345 ,  H01L2224/03452 ,  H01L2224/0361 ,  H01L2224/03914 ,  H01L2224/05617 ,  H01L2224/05639 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/05655 ,  H01L2224/05664 ,  H01L2224/08145 ,  H01L2224/08225 ,  H01L2224/08245 ,  H01L2224/80004 ,  H01L2224/80006 ,  H01L2224/80052 ,  H01L2224/80201 ,  H01L2224/80203 ,  H01L2224/80379 ,  H01L2224/80801 ,  H01L2224/8083 ,  H01L2224/80894 ,  H01L2224/9202 ,  H01L2924/1306 ,  H01L2924/13091 ,  H01L2924/00014 ,  H01L2924/00012 ,  H01L2924/01032 ,  H01L2224/03 ,  H01L2924/00

Abstract: A device and method for fabrication includes providing a first substrate assembly including a first substrate and a first metal layer formed on the first substrate and a second substrate assembly including a second substrate and a second metal layer formed on the second substrate. The first metal layer is joined to the second metal layer using a cold welding process wherein one of the first substrate and the second substrate includes a semiconductor channel layer for forming a transistor device.

Abstract translation: 一种用于制造的器件和方法，包括提供包括第一衬底和形成在第一衬底上的第一金属层的第一衬底组件以及包括形成在第二衬底上的第二衬底和第二金属层的第二衬底组件。 使用冷焊工艺将第一金属层接合到第二金属层，其中第一衬底和第二衬底之一包括用于形成晶体管器件的半导体沟道层。

公开(公告)号：US20130252399A1

公开(公告)日：2013-09-26

申请号：US13784001

申请日：2013-03-04

Applicant: COMMISSARIAT A L'ENERGIE ATOMIQUE ET AUX ENE ALT

Inventor： Patrick LEDUC

IPC: H01L21/02

CPC classification number: H01L21/0226 ,  H01L21/187 ,  H01L23/293 ,  H01L24/05 ,  H01L24/80 ,  H01L2221/1047 ,  H01L2224/05186 ,  H01L2224/05571 ,  H01L2224/05647 ,  H01L2224/05655 ,  H01L2224/08147 ,  H01L2224/80007 ,  H01L2224/8001 ,  H01L2224/80201 ,  H01L2224/80357 ,  H01L2224/80895 ,  H01L2224/80896 ,  H01L2924/00014 ,  H01L2924/00012 ,  H01L2224/05552 ,  H01L2924/04941 ,  H01L2924/04953

Abstract: A method for direct bonding between a first element and a second element, including at least the following steps: deposition of at least one first porous layer on at least one face of the first element, where the first porous layer is compressible, production of at least one bonding layer on the first porous layer, rigid connection by direct bonding of the second element with the first bonding layer.

Abstract translation: 一种用于在第一元件和第二元件之间直接结合的方法，至少包括以下步骤：在第一元件的至少一个表面上沉积至少一个第一多孔层，其中第一多孔层是可压缩的， 在第一多孔层上的至少一个结合层，通过第二元件与第一粘结层的直接接合来进行刚性连接。

公开(公告)号：US20240274461A1

公开(公告)日：2024-08-15

申请号：US18110134

申请日：2023-02-15

Applicant: Taiwan Semiconductor Manufacturing Company Limited

Inventor： Chia-Yin CHEN ,  I-Chun HSU ,  Yu-Sheng LIN ,  Yan-Zuo TSAI ,  Yung-Chi LIN ,  Tsang-Jiuh WU ,  Wen-Chih CHIOU

IPC: H01L21/683 ,  H01L21/67 ,  H01L23/00

CPC classification number: H01L21/6838 ,  H01L21/67144 ,  H01L24/80 ,  H01L24/05 ,  H01L2224/05647 ,  H01L2224/80201 ,  H01L2224/80379 ,  H01L2224/80895 ,  H01L2224/80896

Abstract: A die bonding tool having a tool head including a plurality of openings fluidly coupled to a vacuum source to selectively secure a semiconductor die onto the tool head via the application of a suction force. The plurality of openings have non-uniform cross-sectional areas, including one or more first openings having a first cross-sectional area and one or more second openings having a second cross-sectional area that is greater than the first cross-section area. A first minimum offset distance between each of the first openings and any peripheral edge of the tool head is less than a second minimum offset distance between each of the second openings and any peripheral edge of the tool head. The configuration of the openings in the tool head may improve bonding of the semiconductor die to a substrate by inhibiting air becoming trapped between the semiconductor die and the substrate during the bonding process.

公开(公告)号：US20240250061A1

公开(公告)日：2024-07-25

申请号：US18624954

申请日：2024-04-02

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Yung-Chi Lin ,  Tsang-Jiuh Wu ,  Wen-Chih Chiou ,  Chen-Hua Yu

IPC: H01L23/00 ,  B23K26/362 ,  H01L21/3213 ,  H01L25/00 ,  H01L25/065

CPC classification number: H01L24/80 ,  B23K26/362 ,  H01L21/32136 ,  H01L24/03 ,  H01L24/08 ,  H01L25/0657 ,  H01L25/50 ,  H01L2224/08146 ,  H01L2224/80201 ,  H01L2224/80895 ,  H01L2224/80896 ,  H01L2924/37001

Abstract: In an embodiment, a device includes: a first wafer including a first substrate and a first interconnect structure, a sidewall of the first interconnect structure forming an obtuse angle with a sidewall of the first substrate; and a second wafer bonded to the first wafer, the second wafer including a second substrate and a second interconnect structure, the sidewall of the first substrate being laterally offset from a sidewall of the second substrate and a sidewall of the second interconnect structure.

公开(公告)号：US20230317653A1

公开(公告)日：2023-10-05

申请号：US17709367

申请日：2022-03-30

Applicant: Intel Corporation

Inventor： Hongxia FENG ,  Xiaoxuan SUN ,  Amey Anant APTE ,  Dingying David XU ,  Sairam AGRAHARAM ,  Gang DUAN ,  Ashay DANI

IPC: H01L23/00 ,  H01L25/10 ,  H01L25/00

CPC classification number: H01L24/08 ,  H01L24/05 ,  H01L24/06 ,  H01L25/105 ,  H01L25/50 ,  H01L24/80 ,  H01L2224/80379 ,  H01L2224/8049 ,  H01L2924/07025 ,  H01L2224/0557 ,  H01L2224/05647 ,  H01L2224/06181 ,  H01L2224/08225 ,  H01L2224/13025 ,  H01L24/13 ,  H01L24/03 ,  H01L2224/03845 ,  H01L2224/94 ,  H01L24/94 ,  H01L2224/80855 ,  H01L2224/80201 ,  H01L2225/1023 ,  H01L2225/1047

Abstract: Embodiments herein relate to systems, apparatuses, techniques or processes for hybrid bonding a die to a substrate. In embodiments, the die may be a chiplet that is bonded to an interconnect. In embodiments, the die may be a plurality of dies, where the plurality of dies are hybrid bonded to a substrate, to each other, or a combination of both. Other embodiments may be described and/or claimed.

公开(公告)号：US09640509B1

公开(公告)日：2017-05-02

申请号：US15280524

申请日：2016-09-29

Applicant: International Business Machines Corporation

Inventor： Chih-Chao Yang

IPC: H01L23/00

CPC classification number: H01L24/26 ,  H01L24/03 ,  H01L24/05 ,  H01L24/08 ,  H01L24/27 ,  H01L24/32 ,  H01L24/80 ,  H01L24/94 ,  H01L25/50 ,  H01L2224/0341 ,  H01L2224/0345 ,  H01L2224/03452 ,  H01L2224/0346 ,  H01L2224/0361 ,  H01L2224/03616 ,  H01L2224/039 ,  H01L2224/04 ,  H01L2224/05026 ,  H01L2224/05073 ,  H01L2224/05082 ,  H01L2224/05157 ,  H01L2224/05166 ,  H01L2224/05176 ,  H01L2224/05181 ,  H01L2224/05184 ,  H01L2224/05187 ,  H01L2224/05557 ,  H01L2224/05571 ,  H01L2224/05572 ,  H01L2224/05624 ,  H01L2224/05647 ,  H01L2224/05657 ,  H01L2224/05673 ,  H01L2224/05676 ,  H01L2224/05681 ,  H01L2224/05684 ,  H01L2224/08145 ,  H01L2224/08147 ,  H01L2224/08148 ,  H01L2224/80075 ,  H01L2224/80201 ,  H01L2224/80365 ,  H01L2224/80385 ,  H01L2224/80895 ,  H01L2224/80948 ,  H01L2224/94 ,  H01L2224/08 ,  H01L2224/80 ,  H01L2924/00014 ,  H01L2924/00012 ,  H01L2924/04953 ,  H01L2924/01022 ,  H01L2924/0498 ,  H01L2924/01044 ,  H01L2924/01073 ,  H01L2924/0509 ,  H01L2924/0496 ,  H01L2924/01074

Abstract: A first semiconductor structure having a first metallic structure that has a convex outermost surface and a second semiconductor structure having a second metallic structure that has a concave outermost surface are first provided. The first and second metallic structures are provided utilizing liner systems that have an opposite galvanic reaction to the metal or metal alloy that constitutes the first and second metallic structures such that during a planarization process the metal liners have a different removal rate than the metal or metal alloy that constitutes the first and second metallic structures. The first semiconductor structure and the second semiconductor structure are then bonded together such that the convex outermost surface of the first metallic structure is in direct contact with the concave outermost surface of the second metallic structure.

公开(公告)号：US20160155721A1

公开(公告)日：2016-06-02

申请号：US14950281

申请日：2015-11-24

Applicant: TOKYO ELECTRON LIMITED

Inventor： Kenji SUGAKAWA ,  Yuji MIMURA ,  Shuhei MATSUMOTO ,  Takahiro MASUNAGA ,  Makoto TSUKISHIMA

IPC: H01L23/00 ,  H01L21/67 ,  H01L21/66

CPC classification number: H01L21/67248 ,  H01L21/67092 ,  H01L21/681 ,  H01L21/8221 ,  H01L22/12 ,  H01L22/20 ,  H01L24/08 ,  H01L24/75 ,  H01L24/80 ,  H01L24/94 ,  H01L2224/08145 ,  H01L2224/7501 ,  H01L2224/75251 ,  H01L2224/75252 ,  H01L2224/75301 ,  H01L2224/75601 ,  H01L2224/7565 ,  H01L2224/75702 ,  H01L2224/75704 ,  H01L2224/75705 ,  H01L2224/75744 ,  H01L2224/75745 ,  H01L2224/75753 ,  H01L2224/75802 ,  H01L2224/75804 ,  H01L2224/75822 ,  H01L2224/75823 ,  H01L2224/75824 ,  H01L2224/759 ,  H01L2224/75981 ,  H01L2224/80003 ,  H01L2224/80013 ,  H01L2224/80048 ,  H01L2224/8013 ,  H01L2224/80132 ,  H01L2224/80201 ,  H01L2224/80894 ,  H01L2224/80908 ,  H01L2224/83201 ,  H01L2224/94 ,  H01L2924/3511 ,  H01L2924/00012 ,  H01L2224/80 ,  H01L2924/00014

Abstract: There is provided a method of bonding substrates to each other, which includes: holding a first substrate on a lower surface of a first holding part; adjusting a temperature of a second substrate by a temperature adjusting part to become higher than a temperature of the first substrate; holding the second substrate on an upper surface of a second holding part; inspecting a state of the second substrate by imaging a plurality of reference points of the second substrate with a first imaging part, measuring positions of the reference points, and comparing a measurement result with a predetermined permissible range; and pressing a central portion of the first substrate with a pressing member, bringing the central portion of the first substrate into contact with a central portion of the second substrate, and sequentially bonding the first substrate and the second substrate.

Abstract translation: 提供了将基板彼此接合的方法，其包括：将第一基板保持在第一保持部的下表面上; 通过温度调节部分调节第二基板的温度以变得高于第一基板的温度; 将第二基板保持在第二保持部的上表面上; 通过用第一成像部分对第二基板的多个参考点进行成像来检查第二基板的状态，测量参考点的位置，并将测量结果与预定的允许范围进行比较; 并且用按压部件按压所述第一基板的中央部，使所述第一基板的中央部与所述第二基板的中央部接触，并顺序地接合所述第一基板和所述第二基板。

公开(公告)号：US20160155665A1

公开(公告)日：2016-06-02

申请号：US15018422

申请日：2016-02-08

Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.

Inventor： Hsun-Chung Kuang ,  Yen-Chang Chu ,  Cheng-Tai Hsiao ,  Ping-Yin Liu ,  Lan-Lin Chao ,  Yeur-Luen Tu ,  Chia-Shiung Tsai ,  Xiaomeng Chen

IPC: H01L21/768 ,  H01L25/00

CPC classification number: H01L21/76883 ,  H01L21/76805 ,  H01L23/291 ,  H01L23/293 ,  H01L23/3192 ,  H01L23/538 ,  H01L23/5385 ,  H01L23/562 ,  H01L24/05 ,  H01L24/06 ,  H01L24/08 ,  H01L24/10 ,  H01L24/18 ,  H01L24/80 ,  H01L24/89 ,  H01L25/043 ,  H01L25/0657 ,  H01L25/0756 ,  H01L25/50 ,  H01L2224/03616 ,  H01L2224/05124 ,  H01L2224/05147 ,  H01L2224/05547 ,  H01L2224/05624 ,  H01L2224/05647 ,  H01L2224/05655 ,  H01L2224/05684 ,  H01L2224/80097 ,  H01L2224/80201 ,  H01L2224/80357 ,  H01L2224/80895 ,  H01L2224/80896 ,  H01L2224/80948 ,  H01L2225/06513 ,  H01L2924/01029 ,  H01L2924/01322 ,  H01L2924/00014 ,  H01L2924/00

Abstract: An integrated circuit structure includes a package component, which further includes a non-porous dielectric layer having a first porosity, and a porous dielectric layer over and contacting the non-porous dielectric layer, wherein the porous dielectric layer has a second porosity higher than the first porosity. A bond pad penetrates through the non-porous dielectric layer and the porous dielectric layer. A dielectric barrier layer is overlying, and in contact with, the porous dielectric layer. The bond pad is exposed through the dielectric barrier layer. The dielectric barrier layer has a planar top surface. The bond pad has a planar top surface higher than a bottom surface of the dielectric barrier layer.

公开(公告)号：US09318471B2

公开(公告)日：2016-04-19

申请号：US14920289

申请日：2015-10-22

Applicant: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.

Inventor： Tatsuya Kabe ,  Hideyuki Arai

IPC: H01L21/00 ,  H01L25/065 ,  H01L23/00 ,  H01L27/06 ,  H01L23/522 ,  H01L21/768 ,  H01L49/02

CPC classification number: H01L25/0657 ,  H01L21/76898 ,  H01L23/5223 ,  H01L23/5227 ,  H01L24/05 ,  H01L24/08 ,  H01L24/80 ,  H01L27/0688 ,  H01L28/20 ,  H01L28/40 ,  H01L2224/05568 ,  H01L2224/05571 ,  H01L2224/05624 ,  H01L2224/05647 ,  H01L2224/05655 ,  H01L2224/05684 ,  H01L2224/0603 ,  H01L2224/06051 ,  H01L2224/08145 ,  H01L2224/80097 ,  H01L2224/80201 ,  H01L2224/80357 ,  H01L2224/80895 ,  H01L2224/80896 ,  H01L2224/9202 ,  H01L2225/06513 ,  H01L2225/06541 ,  H01L2924/01013 ,  H01L2924/01015 ,  H01L2924/01027 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01047 ,  H01L2924/01074 ,  H01L2924/0132 ,  H01L2924/05042 ,  H01L2924/0534 ,  H01L2924/05442 ,  H01L2924/0549 ,  H01L2924/00014 ,  H01L2924/00012

Abstract: A semiconductor device includes: a first substrate including a first surface layer that includes first and second electrodes; a second substrate including a second surface layer that includes third and fourth electrodes, and directly bonded to the first substrate such that the second surface layer is in contact with the first surface layer; and a functional film provided between the second and fourth electrodes. The first and third electrodes are bonded together so as to be in contact with each other, and the second electrode, the functional film, and the fourth electrode constitute a passive element.

Abstract translation: 一种半导体器件包括：第一衬底，包括包括第一和第二电极的第一表面层; 第二基板，包括包括第三和第四电极的第二表面层，并且直接接合到第一基板，使得第二表面层与第一表面层接触; 以及设置在第二和第四电极之间的功能膜。 第一和第三电极彼此接触结合在一起，并且第二电极，功能膜和第四电极构成无源元件。

公开(公告)号：US20150102447A1

公开(公告)日：2015-04-16

申请号：US14399824

申请日：2013-05-06

Applicant: COMMISSARIAT A L'ENERGIE ATOMIQUE ET AUX ENE ALT

Inventor： Stephanie Huet ,  Abdenacer Ait-Mani ,  Lea Di Cioccio

IPC: H01L27/146

CPC classification number: H01L27/1469 ,  H01L24/03 ,  H01L24/05 ,  H01L24/08 ,  H01L24/19 ,  H01L24/80 ,  H01L27/14632 ,  H01L27/14636 ,  H01L27/1465 ,  H01L27/14687 ,  H01L27/14692 ,  H01L2224/03845 ,  H01L2224/04105 ,  H01L2224/05571 ,  H01L2224/05647 ,  H01L2224/08147 ,  H01L2224/19 ,  H01L2224/221 ,  H01L2224/80201 ,  H01L2224/80357 ,  H01L2224/80895 ,  H01L2224/80896 ,  H01L2224/80948 ,  H01L2224/96 ,  H01L2924/00014 ,  H01L2924/12036 ,  H01L2924/12043 ,  H01L2924/351 ,  H01L2224/80001 ,  H01L2924/00012 ,  H01L2224/05552 ,  H01L2924/00

Abstract: A method for producing at least one photosensitive infrared detector by assembling a first electronic component including plural photodiodes sensitive to infrared radiation and a second electronic component including at least one electronic circuit for reading the plurality of photodiodes, an infrared detector, and an assembly for producing such a detector, the method including: production, on each one of the first and second components, of a connection face formed at least partially by a silicon oxide (SiO2)-based layer; bonding the first component and the second component by the connection faces thereof, thus performing the direct bonding of the two components. The method can simplify hybridization of heterogeneous components for producing an infrared detector.

Abstract translation: 一种用于通过组装包括对红外线辐射敏感的多个光电二极管的第一电子部件和包括至少一个用于读取多个光电二极管的电子电路的第二电子部件来生产至少一个光敏红外检测器的方法，红外检测器和用于产生 这种检测器，该方法包括：在第一和第二部件中的每一个上生产至少部分由基于氧化硅（SiO 2）的层形成的连接面; 通过其连接面将第一部件和第二部件接合，由此执行两个部件的直接接合。 该方法可以简化用于产生红外检测器的异质组分的杂交。