公开(公告)号：US06884334B2

公开(公告)日：2005-04-26

申请号：US10041058

申请日：2001-12-28

Applicant: Konstantin Volodarsky ,  Boguslaw A. Nigorski ,  Rimma Volodarsky ,  Douglas W. Young ,  Cyprian Uzoh ,  Homayoun Talieh

Inventor： Konstantin Volodarsky ,  Boguslaw A. Nigorski ,  Rimma Volodarsky ,  Douglas W. Young ,  Cyprian Uzoh ,  Homayoun Talieh

IPC: C25D7/12 ,  H01L21/00 ,  H01L21/02 ,  H01L21/3063 ,  C25D5/00

CPC classification number: H01L21/6719 ,  C25D7/12 ,  C25D17/001 ,  H01L21/67028 ,  Y10S134/902

Abstract: The present invention relates to a containment chamber that is used for carrying out multiple processing steps such as depositing on, polishing, etching, modifying, rinsing, cleaning, and drying a surface on the workpiece. In one example of the present invention, the chamber is used to electro chemically mechanically deposit a conductive material on a semiconductor wafer. The same containment chamber can then be used to rinse and clean the same wafer. As a result, the present invention eliminates the need for separate processing stations for depositing the conductive material and cleaning the wafer. Thus, with the present invention, costs and physical space are reduced while providing an efficient apparatus and method for carrying out multiple processes on the wafer surface using a containment chamber.

Abstract translation: 本发明涉及一种用于进行多个处理步骤的容纳室，例如沉积，抛光，蚀刻，改性，漂洗，清洁和干燥工件上的表面。 在本发明的一个实例中，室用于在半导体晶片上化学机械地沉积导电材料。 然后可以使用相同的容纳室来冲洗和清洁相同的晶片。 结果，本发明消除了对用于沉积导电材料和清洁晶片的单独处理站的需要。 因此，利用本发明，降低了成本和物理空间，同时提供了使用容纳室在晶片表面上执行多个工艺的有效的装置和方法。

公开(公告)号：US20050040049A1

公开(公告)日：2005-02-24

申请号：US10914490

申请日：2004-08-10

Applicant: Rimma Volodarsky ,  Konstantin Volodarsky ,  Cyprian Uzoh ,  Homayoun Talieh ,  Douglas Young

Inventor： Rimma Volodarsky ,  Konstantin Volodarsky ,  Cyprian Uzoh ,  Homayoun Talieh ,  Douglas Young

IPC: B23H7/00 ,  C25D5/08 ,  C25D7/12 ,  C25D17/10 ,  H01L21/288 ,  H01L21/768

CPC classification number: C25D17/001 ,  C25D5/08 ,  C25D17/008 ,  C25D17/10 ,  H01L21/2885 ,  H01L21/7684 ,  H01L21/76877

Abstract: A particular anode assembly can be used to supply a solution for any of a plating operation, a planarization operation, and a plating and planarization operation to be performed on a semiconductor wafer. The anode assembly includes a rotatable shaft disposed within a chamber in which the operation is performed, an anode housing connected to the shaft, and a porous pad support plate attached to the anode housing. The support plate has a top surface adapted to support a pad which is to face the wafer, and, together with the anode housing, defines an anode cavity. A consumable anode may be provided in the anode cavity to provide plating material to the solution. A solution delivery structure by which the solution can be delivered to said anode cavity is also provided. The solution delivery structure may be contained within the chamber in which the operation is performed. A shield can also be mounted between the shaft and an associated spindle to prevent leakage of the solution from the chamber.

Abstract translation: 可以使用特定的阳极组件来提供用于在半导体晶片上进行的电镀操作，平面化操作和电镀和平面化操作中的任何一种的解决方案。 阳极组件包括设置在其中执行操作的室内的可旋转轴，连接到轴的阳极壳体和附接到阳极壳体的多孔垫支撑板。 支撑板具有适于支撑面向晶片的焊盘的顶表面，并且与阳极壳体一起限定阳极腔。 可以在阳极腔中设置消耗性阳极以向溶液提供电镀材料。 还提供了可以将溶液输送到所述阳极腔的溶液输送结构。 溶液输送结构可以包含在进行操作的室内。 护罩还可以安装在轴和相关主轴之间，以防止溶液从腔室泄漏。

公开(公告)号：US20050034994A1

公开(公告)日：2005-02-17

申请号：US10947628

申请日：2004-09-21

Applicant: Jalal Ashjaee ,  Boguslaw Nagorski ,  Bulent Basol ,  Homayoun Talieh ,  Cyprian Uzoh

Inventor： Jalal Ashjaee ,  Boguslaw Nagorski ,  Bulent Basol ,  Homayoun Talieh ,  Cyprian Uzoh

IPC: C25D7/12 ,  C25F7/00 ,  C25D5/00 ,  B23H3/00

CPC classification number: C25F7/00 ,  C25D7/123 ,  C25D17/001 ,  H01L21/2885

Abstract: Deposition of conductive material on or removal of conductive material from a workpiece frontal side of a semiconductor workpiece is performed by providing an anode having an anode area which is to face the workpiece frontal side, and electrically connecting the workpiece frontal side with at least one electrical contact, outside of the anode area, by pushing the electrical contact and the workpiece frontal side into proximity with each other. A potential is applied between the anode and the electrical contact, and the workpiece is moved with respect to the anode and the electrical contact. Full-face electroplating or electropolishing over the workpiece frontal side surface, in its entirety, is thus permitted.

公开(公告)号：US20050006244A1

公开(公告)日：2005-01-13

申请号：US10723045

申请日：2003-11-26

Applicant: Cyprian Uzoh ,  Bulent Basol

Inventor： Cyprian Uzoh ,  Bulent Basol

IPC: C25D5/08 ,  C25D7/12 ,  C25D17/14 ,  C25F7/00 ,  H01L21/288 ,  H01L21/321 ,  H01L21/3213 ,  H01L21/768 ,  C25D5/20 ,  C25D21/10

CPC classification number: H01L21/2885 ,  C25D5/08 ,  C25D7/12 ,  C25D17/001 ,  C25D17/14 ,  C25F7/00 ,  H01L21/32115 ,  H01L21/3212 ,  H01L21/32134 ,  H01L21/76877

Abstract: The present invention provides a novel system, apparatus, and method to deposit conductive films on a workpiece. A system for electroplating a surface of a workpiece using a process solution is disclosed. The system comprises a solution housing configured to house an electrode and to contain the process solution, a filter element disposed in the solution housing configured to partition the solution housing into a lower chamber and an upper chamber, and an upper inlet port coupled to the solution housing configured to deliver the process solution to the upper chamber of the solution housing to fill the upper chamber and the lower chamber immersing the electrode in the lower chamber.

Abstract translation: 本发明提供了一种在工件上沉积导电膜的新型系统，装置和方法。 公开了一种使用工艺溶液对工件的表面进行电镀的系统。 该系统包括配置成容纳电极并容纳处理溶液的溶液壳体，设置在溶液壳体中的过滤元件，构造成将溶液壳体分隔成下腔室和上腔室，以及连接到溶液的上入口端口 壳体，被配置为将处理溶液输送到溶液壳体的上腔室以填充上室，下室将电极浸入下室中。

公开(公告)号：US06815354B2

公开(公告)日：2004-11-09

申请号：US10282976

申请日：2002-10-28

Applicant: Cyprian Uzoh ,  Bulent M. Basol ,  Homayoun Talieh

Inventor： Cyprian Uzoh ,  Bulent M. Basol ,  Homayoun Talieh

IPC: H01L2100

CPC classification number: H01L21/7684 ,  H01L21/76885 ,  H01L23/53238 ,  H01L2924/0002 ,  H01L2924/00

Abstract: A process for forming a conductive structure on a substrate is provided. The substrate has a copper seed layer that is partially exposed through a plurality of openings in a masking layer such as a photoresist. The masking layer is formed on the seed layer. The process electroplates copper through the openings and onto the seed layer. During the copper electroplating process the surface of the masking layer is mechanically swept. The process forms planar conductive material deposits filling the plurality of holes in the masking layer. The upper ends of the conductive deposits are substantially co-planar.

Abstract translation: 提供了在基板上形成导电结构的工艺。 衬底具有通过诸如光致抗蚀剂的掩模层中的多个开口部分暴露的铜籽晶层。 掩蔽层形成在种子层上。 该方法通过开口将铜电镀到种子层上。 在铜电镀过程中，屏蔽层的表面被机械扫掠。 该过程形成填充掩模层中的多个孔的平面导电材料沉积物。 导电沉积物的上端基本上是共面的。

公开(公告)号：US06610190B2

公开(公告)日：2003-08-26

申请号：US09760757

申请日：2001-01-17

Applicant: Bulent M. Basol ,  Cyprian Uzoh ,  Homayoun Talieh

Inventor： Bulent M. Basol ,  Cyprian Uzoh ,  Homayoun Talieh

IPC: C25D508

CPC classification number: C25D5/02 ,  C25D7/123 ,  C25D17/001 ,  H01L21/2885 ,  H01L21/3212 ,  H01L21/76877

Abstract: A system for depositing materials on a surface of a wafer or removing materials from the surface of a wafer includes an electrode, a shaping plate, a liquid solution contained between the electrode and the wafer surface, and electrical contact members contacting selected locations on the wafer surface. The shaping plate is supported between the electrode and the wafer surface such that an upper surface of the shaping plate faces the wafer surface. The shaping plate can have a plurality of channels where each puts the wafer surface in a fluid communication with the electrode. The electrical contact members contact the selected locations on the wafer surface through a recessed edge of the shaping plate such that when the wafer is rotated, the selected contact locations move over the shaping plate and are plated under an applied potential. Advantages of the invention include substantially full surface treatment of the wafer.

Abstract translation: 用于在晶片的表面上沉积材料或从晶片表面去除材料的系统包括电极，成形板，包含在电极和晶片表面之间的液体溶液以及与晶片上的选定位置接触的电接触元件 表面。 成形板支撑在电极和晶片表面之间，使得成形板的上表面面向晶片表面。 成形板可以具有多个通道，其中每个通道将晶片表面与电极流体连通。 电接触构件通过成形板的凹入边缘接触晶片表面上的选定位置，使得当晶片旋转时，所选择的接触位置在成形板上移动并在施加电位下进行电镀。 本发明的优点包括晶片的基本全表面处理。

公开(公告)号：US06497800B1

公开(公告)日：2002-12-24

申请号：US09685934

申请日：2000-10-11

Applicant: Homayoun Talieh ,  Cyprian Uzoh ,  Bulent M. Basol

Inventor： Homayoun Talieh ,  Cyprian Uzoh ,  Bulent M. Basol

IPC: C25D1700

CPC classification number: B23H3/04 ,  B23H5/08 ,  C25D5/08 ,  C25D17/00 ,  C25D17/001 ,  C25D17/005 ,  C25F7/00 ,  H01L21/2885

Abstract: Substantially uniform deposition of conductive material on a surface of a substrate, which substrate includes a semiconductor wafer, from an electrolyte containing the conductive material can be provided by way of a particular device which includes first and second conductive elements. The first conductive element can have multiple electrical contacts, of identical or different configurations, or may be in the form of a conductive pad, and can contact or otherwise electrically interconnect with the substrate surface over substantially all of the substrate surface. Upon application of a potential between the first and second conductive elements while the electrolyte makes physical contact with the substrate surface and the second conductive element, the conductive material is deposited on the substrate surface. It is possible to reverse the polarity of the voltage applied between the anode and the cathode so that electro-etching of deposited conductive material can be performed.

Abstract translation: 可以通过包括第一和第二导电元件的特定装置来提供导电材料在包含导电材料的电解质的衬底的包括半导体晶片的表面上的基本均匀沉积。 第一导电元件可以具有相同或不同构造的多个电触点，或者可以是导电焊盘的形式，并且可以在基本上所有的衬底表面上与衬底表面接触或以其他方式电互连。 当在电解质与衬底表面和第二导电元件物理接触的同时在第一和第二导电元件之间施加电势时，导电材料沉积在衬底表面上。 可以使施加在阳极和阴极之间的电压的极性反转，从而可以对沉积的导电材料进行电蚀刻。

公开(公告)号：US06413388B1

公开(公告)日：2002-07-02

申请号：US09511278

申请日：2000-02-23

Applicant: Cyprian Uzoh ,  Bulent Basol ,  Homayoun Talieh

Inventor： Cyprian Uzoh ,  Bulent Basol ,  Homayoun Talieh

IPC: C25D1700

CPC classification number: B24B37/26 ,  B23H5/08 ,  C25D17/001 ,  C25D17/14

Abstract: An apparatus capable of assisting in controlling an electrolyte flow and an electric field distribution used for processing a substrate is provided. It includes a rigid member having a top surface of a predetermined shape and a bottom surface. The rigid member contains a plurality of channels, each forming a passage from the top surface to the bottom surface, and each allowing the electrolyte and electric field flow therethrough. A pad is attached to the rigid member via a fastener. The pad also allows for electrolyte and electric field flow therethrough to the substrate.

Abstract translation: 提供一种能够辅助控制用于处理基板的电解质流动和电场分布的装置。 它包括具有预定形状的顶表面和底表面的刚性构件。 刚性构件包括多个通道，每个通道形成从顶表面到底表面的通道，并且每个通道允许电解质和电场流过其中。 垫通过紧固件附接到刚性构件。 衬垫还允许电解质和电场流过衬底。

公开(公告)号：US06352623B1

公开(公告)日：2002-03-05

申请号：US09466014

申请日：1999-12-17

Applicant: Konstantin Volodarsky ,  Boguslaw A. Nagorski ,  Rimma Volodarsky ,  Douglas W. Young ,  Cyprian Uzoh ,  Homayoun Talieh

Inventor： Konstantin Volodarsky ,  Boguslaw A. Nagorski ,  Rimma Volodarsky ,  Douglas W. Young ,  Cyprian Uzoh ,  Homayoun Talieh

IPC: C25B900

CPC classification number: H01L21/6719 ,  C25D7/12 ,  C25D17/001 ,  H01L21/67028 ,  Y10S134/902

Abstract: The present invention relates to a containment chamber that is used for carrying out multiple processing steps such as depositing on, polishing, etching, modifying, rinsing, cleaning, and drying a surface on the workpiece. In one example of the present invention, the chamber is used to electro chemically mechanically deposit a conductive material on a semiconductor wafer. The same containment chamber can then be used to rinse and clean the same wafer. As a result, the present invention eliminates the need for separate processing stations for depositing the conductive material and cleaning the wafer. Thus, with the present invention, costs and physical space are reduced while providing an efficient apparatus and method for carrying out multiple processes on the wafer surface using a containment chamber.