公开(公告)号：DE69428086D1

公开(公告)日：2001-10-04

申请号：DE69428086

申请日：1994-09-15

Applicant: NCR INT INC ,  HYUNDAI ELECTRONICS AMERICA ,  SYMBIOS INC

Inventor： YAKURA JAMES P ,  COLE RICHARD K ,  VON THUN MATTHEW S ,  HASS CRYSTAL J ,  ALLMAN DERRYL D J

IPC: H01L21/66 ,  G01K1/02 ,  G01K7/00 ,  H01L21/00

Abstract: An apparatus for sensing data such as temperature with respect to objects such as silicon wafers undergoing fabrication or other processes involve the use of a monitor element of material and configuration similar to that of the objects being processed. A structure such as a closed loop or segment of a spiral may be formed on the surface of the monitor element, and acts as a secondary coil when brought into operative relation with a transformer structure which includes a primary coil, a current source and a sensing device. The sensing device senses variations in the electrical characteristics in the primary coil, caused by the presence of the monitor element, and can thereby determine the temperature or other desired data relating to the monitor element, which is substantially the same as comparable data for the objects being processed.

公开(公告)号：DE69520706T2

公开(公告)日：2001-08-02

申请号：DE69520706

申请日：1995-05-31

Applicant: HYUNDAI ELECTRONICS AMERICA

Inventor： AVERY JAMES M ,  ISENBERG WILLIAM D

IPC: G06F17/50

Abstract: The invention provides for a method and apparatus for producing an electronic circuit (16) which allows a device (14) to be connected to a bus (12), such as a system bus in a computer. The invention accepts user specified parameters for configuring a device adapter (16) which interfaces the device (14) to the bus (12), and thereafter generates a customized device adapter (16) based on such user specified parameters. By using a common design macro, which is programmable, a user can easily specify and generate custom device adapters for a plurality of dissimilar devices to be connected to the bus. A resulting adapter architecture allows for multiple, dissimilar devices to interface to a computer bus (12) with a single device adapter (16) integrated circuit or card.

公开(公告)号：DE69426407T2

公开(公告)日：2001-04-19

申请号：DE69426407

申请日：1994-10-10

Applicant: NCR INT INC ,  HYUNDAI ELECTRONICS AMERICA ,  SYMBIOS LOGIC INC

Inventor： TEENE ANDRES R

IPC: G01R31/28 ,  G01R31/30 ,  H01L21/66 ,  G06F11/24 ,  G06F11/26

Abstract: Current monitoring cells (12) are located at selected locations on power supply lines (16) within a chip. Each cell (12) compares the current flow at predetermined times with a reference. If the current exceeds the reference, a signal is provided indicating a fault in the chip. A flip flop (30) in the cell is set to maintain an indication of the fault condition. In two embodiments, the cells are connected with a scan chain which is used to sequentially access the test results for each cell. A third embodiment does not include the scan chain but the cells (12) are individually selectable. A current divider (56) may be included in each cell to isolate the voltage drop of the fault sensor from the functional circuit to minimize the impact of measuring the current for fault detection purposes.

公开(公告)号：GB2316510B

公开(公告)日：2000-08-30

申请号：GB9716013

申请日：1997-07-29

Applicant: HYUNDAI ELECTRONICS AMERICA

Inventor： JENNINGS EARLE W

IPC: G06F12/14 ,  G06F12/08 ,  G06F21/24 ,  G06T1/20 ,  H04N5/907 ,  H04N7/26 ,  H04N7/50 ,  G06F13/12

Abstract: Computer systems may be provided with additional performance for demanding applications while adding little additional hardware. For example, a slave device for a host computer system combines an embedded programmable controller with non-volatile memory, local RAM, and interface logic. The host computer system treats the slave device as if it would be a hierarchical memory system such as a conventional disk drive on which it may store and retrieve files. Additionally, the host computer system may program the controller to perform operations on stored information, including image processing and/or data compression. The non-volatile memory may include a disk drive, writable CD-ROM, optical drive, or non-volatile solid state memory.

公开(公告)号：DE69423069T2

公开(公告)日：2000-08-24

申请号：DE69423069

申请日：1994-10-28

Applicant: NCR INT INC ,  HYUNDAI ELECTRONICS AMERICA ,  SYMBIOS INC

Inventor： HOLT NANCY ,  JOHNSON STEPHEN M

IPC: G06F13/38 ,  G06F5/06 ,  G06F5/14

Abstract: The invention relates to a system for transferring data between computers having asynchronous clocks. A FIFO having multiple levels holds the data while en route from a sender to a receiver. The system includes a status register (FF0-FF15) for monitoring the FIFO. When all levels of the FIFO become full, the status register (FF0-FF15) issues a FIFO_FULL signal. When all levels become empty, the status register (FF0-FF15) issues a FIFO_EMPTY signal. In these signals, there are four events whose timing is important. (1) The ACTUATION of the FIFO_FULL occurs immediately after a WRITE signal is sent by the sender to the status register (FF)-FF15); (2) the ACTUATION of the FIFO_EMPTY signal occurs immediately after a READ signal is sent by the receiver to the status register (FF0-FF15); (3) the DE-ACTUATION of the FIFO_FULL signal is synchronous with the clock of the computer writing to the FIFO; (4) the DE-ACTUATION of the FIFO_EMPTY signal is synchronous with the clock of the computer reading from the FIFO. The system allows throughput through the FIFO to proceed at a very high speed, even though the sender and receiver are asynchronous.

公开(公告)号：DE69423069D1

公开(公告)日：2000-03-30

申请号：DE69423069

申请日：1994-10-28

Applicant: NCR INT INC ,  HYUNDAI ELECTRONICS AMERICA ,  SYMBIOS INC

Inventor： HOLT NANCY ,  JOHNSON STEPHEN M

IPC: G06F13/38 ,  G06F5/06 ,  G06F5/14

Abstract: The invention relates to a system for transferring data between computers having asynchronous clocks. A FIFO having multiple levels holds the data while en route from a sender to a receiver. The system includes a status register (FF0-FF15) for monitoring the FIFO. When all levels of the FIFO become full, the status register (FF0-FF15) issues a FIFO_FULL signal. When all levels become empty, the status register (FF0-FF15) issues a FIFO_EMPTY signal. In these signals, there are four events whose timing is important. (1) The ACTUATION of the FIFO_FULL occurs immediately after a WRITE signal is sent by the sender to the status register (FF)-FF15); (2) the ACTUATION of the FIFO_EMPTY signal occurs immediately after a READ signal is sent by the receiver to the status register (FF0-FF15); (3) the DE-ACTUATION of the FIFO_FULL signal is synchronous with the clock of the computer writing to the FIFO; (4) the DE-ACTUATION of the FIFO_EMPTY signal is synchronous with the clock of the computer reading from the FIFO. The system allows throughput through the FIFO to proceed at a very high speed, even though the sender and receiver are asynchronous.

公开(公告)号：AU5479499A

公开(公告)日：2000-03-27

申请号：AU5479499

申请日：1999-08-11

Applicant: HYUNDAI ELECTRONICS AMERICA

Inventor： JENNINGS EARLE W III

IPC: G06F15/163 ,  H04L12/44 ,  H04L12/46 ,  H04L12/56 ,  H04L12/66 ,  H04L29/06 ,  H04L12/28

Abstract: A multi-port packet processor on an integrated circuit provides an efficient means to interface multiple high-speed packet-based communications channels. The multi-port packet processor includes multiple port processors. Each port processor can include a channel interface for coupling to a respective communications channel, a channel processor for processing the data packets received through the channel interface, and an interprocessor communications interface for providing communication between the port processors. The channel interface can be designed to process data packets using a particular set of packet-based protocols. Alternatively, the channel interface can be designed having programmable controls to allow processing of data packets using a selected set, from a number of possible sets, of packet-based protocols.

公开(公告)号：SG70594A1

公开(公告)日：2000-02-22

申请号：SG1997001841

申请日：1997-05-30

Applicant: HYUNDAI ELECTRONICS AMERICA

Inventor： WANG HSINGYA ARTHUR ,  YOUNG JEIN-CHEN ,  KWAN MING-SANG ,  CHOI LIHYUN

IPC: H01L21/8238 ,  H01L21/8247 ,  H01L27/092 ,  H01L27/10 ,  H01L27/115 ,  H01L29/788 ,  H01L29/792 ,  G11C16/02

公开(公告)号：DE69514471D1

公开(公告)日：2000-02-17

申请号：DE69514471

申请日：1995-10-02

Applicant: HYUNDAI ELECTRONICS AMERICA

Inventor： PETTY WILLIAM K

IPC: G06F3/041 ,  G06F3/03 ,  G06F3/033 ,  G06F3/044 ,  H01L21/822 ,  H01L27/04 ,  H03H11/04 ,  G06K11/10 ,  G06K11/16

Abstract: The present invention provides for the cancellation of electrostatic noise in a digitizing tablet having a shield (12) supplying a signal proportional to the electrostatic noise which is subtracted from the information signal derived from a digitizing grid (10). A conductive transparent shield (12) is interposed between a digitizing grid (10) and image source (14) so that the same electrostatic noise appears on both. The shield (12) may be grounded on 0 to n-1 edges, n being the number of edges of the shield (12). An electrical signal can be taken from an ungrounded side of the shield (12) and supplied as an input signal to a difference amplifier (16), the other input signal being the information signal from the digitizing grid (10) whereby the output signal from the amplifier (16) is the information signal with the noise signal component cancelled therefrom.

公开(公告)号：GB9930761D0

公开(公告)日：2000-02-16

申请号：GB9930761

申请日：1996-06-28

Applicant: HYUNDAI ELECTRONICS IND ,  HYUNDAI ELECTRONICS AMERICA

IPC: H04N1/00 ,  H04N3/15 ,  H04N17/00