반도체장치의 제조방법
    61.
    发明授权
    반도체장치의 제조방법 失效
    半导体器件制造方法

    公开(公告)号:KR1019950009283B1

    公开(公告)日:1995-08-18

    申请号:KR1019920015206

    申请日:1992-08-24

    Inventor: 신헌종 송윤흡

    CPC classification number: H01L21/28052 H01L21/76889

    Abstract: (i) forming a polycrystal silicon layer as the first conduction layer on an insulating film; (ii) continuously forming a second conduction layer along with a buffer layer over the first conduction layer to prevent the mutual migration of silicon: and (iii) forming a fine resistant metal layer on the second conduction layer. The method achieves miniaturisation and provides high concentration polycrystal silicon.

    Abstract translation: (i)在绝缘膜上形成多晶硅层作为第一导电层; (ii)在第一导电层上连续形成第二导电层以及缓冲层,以防止硅的相互迁移;(iii)在第二导电层上形成耐细金属层。 该方法实现了小型化,并提供了高浓度多晶硅。

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