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公开(公告)号：KR1020090016090A
公开(公告)日：2009-02-13
申请号：KR1020070080487
申请日：2007-08-10
Applicant: 삼성전자주식회사
Inventor： 이강민
IPC: G06F1/04
CPC classification number: G06F1/08 , G06F1/3203 , G06F9/3861 , G06F9/3869 , Y02D10/126
Abstract: A dynamic clock control device of pipeline system and a method thereof are provided to perform operation in a lower power voltage and to maintain an identical clock frequency by dynamically delaying a clock signal inputted in each pipeline stage. A synchronous pipeline system includes a clock generating part(400), a plurality of registers(402, 404, 406, 408, 410), a plurality of combinational logic circuits(412, 414, 416, 418), a plurality of path delay replica circuits(422, 424, 426, 428), and a plurality of clock control unit(432, 434, 436). A stage includes the input register, the combinational logic circuit, the path delay replica circuit, and the output register. The path delay replica circuit outputs operation speed of each combinational logic circuit, a fast path delay, and a slow path delay. The clock control unit receives a path delay signal of each stage, and controls delay of a clock inputted in the register positioned between the combinational logic circuits.
Abstract translation: 提供一种流水线系统的动态时钟控制装置及其方法，通过动态地延迟在每个流水线级输入的时钟信号，以较低的电源电压进行操作并维持相同的时钟频率。 同步流水线系统包括时钟产生部分（400），多个寄存器（402,404,406,408,410），多个组合逻辑电路（412,414,416,418），多个路径延迟 复制电路（422,424,426,428）和多个时钟控制单元（432,434,436）。 一个级包括输入寄存器，组合逻辑电路，路径延迟复制电路和输出寄存器。 路径延迟复制电路输出每个组合逻辑电路的运行速度，快速路径延迟和慢路径延迟。 时钟控制单元接收每一级的路径延迟信号，并且控制输入到位于组合逻辑电路之间的寄存器中的时钟的延迟。
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公开(公告)号：KR1020080070949A
公开(公告)日：2008-08-01
申请号：KR1020070008889
申请日：2007-01-29
Applicant: 삼성전자주식회사
Inventor： 이강민
Abstract: A transceiving method of serial data in a serial communication system, a device, and the serial communication system therefor are provided to reduce an amount of transmission by using a compressive coding method, thereby reducing a transmission time, consequently more data can be transmitted at the same time. A compressing unit(317) outputs counts as increasing the counts until reaching a location of the first discovered information bit in silent-coded parallel data, and outputs a signal which means the end of the silent-coded parallel data to a receiving device(350). A serial converter(315) serially outputs the silent-coded parallel data corresponding to locations indicated by the outputted counts, in bit unit.
Abstract translation: 提供串行通信系统，设备及其串行通信系统中的串行数据的收发方法，以通过使用压缩编码方法来减少发送量，从而减少传输时间，从而可以在 同时。 压缩单元（317）输出计数作为增加计数直到到无声编码的并行数据中的第一个发现的信息位的位置，并且将表示无声编码并行数据的结束的信号输出到接收装置（350 ）。 串行转换器（315）以位为单位串行地输出对应于由输出的计数指示的位置的无声编码的并行数据。
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公开(公告)号：KR100450789B1
公开(公告)日：2004-10-01
申请号：KR1019990018853
申请日：1999-05-25
Applicant: 삼성전자주식회사
Inventor： 이강민
IPC: H04B1/7077 , H04J13/10
CPC classification number: H04B1/70752
Abstract: An apparatus for acquiring a pseudo noise (PN) code and a direct-sequence code division multiple access (DS-CDMA) receiver are provided. The apparatus for acquiring a pseudo noise (PN) code includes a PN code generator for generating K PN codes, a multiplexer for multiplying a received signal by + 1 or -1 according to the value of a PN code selected to be a reference code among K PN codes and outputting the multiplication result, 2 accumulators for accumulating the outputs of the multiplexer according to a predetermined control signal, a selector for outputting the control signal so that the output of the multiplexer can input to one of the accumulators according to (K-1) code values excluding the reference code, a programmable adder for adding the outputs of the accumulators to each other according to a predetermined regulation and outputting K correlation values, and a discriminator for outputting the PN code having a correlation value larger than a predetermined value among the K correlation values. It is possible to reduce the amount of operations by grouping codes during a hybrid search where K code phases are simultaneously searched by the DS-CDMA receiver and to simplify the structure of hardware.
Abstract translation: 提供了一种用于获取伪噪声（PN）码和直接序列码分多址（DS-CDMA）接收机的设备。 用于获取伪噪声（PN）码的设备包括用于产生K个PN码的PN码发生器，用于根据被选择作为参考码的PN码的值乘以+ 1或-1的接收信号的复用器 K个PN码并输出相乘结果，2＆lt; K-1＆gt; 累加器，用于根据预定的控制信号累加多路复用器的输出;选择器，用于输出控制信号，使得多路复用器的输出可以根据除参考码之外的（K-1）个码值输入到累加器中的一个; 一个可编程加法器，用于按照预定的规则将累加器的输出彼此相加，并输出K个相关值;以及鉴别器，用于输出K个相关值中具有大于预定值的相关值的PN码。 在DS-CDMA接收机同时搜索K码相位的混合搜索期间，通过对代码进行分组可以减少操作量，并且可以简化硬件结构。 ＆lt;图像＆GT;
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公开(公告)号：KR1020040003537A
公开(公告)日：2004-01-13
申请号：KR1020020038274
申请日：2002-07-03
Applicant: 삼성전자주식회사
IPC: H04B7/04
CPC classification number: H04B7/0636 , H04B7/063 , H04B7/0634 , H04B7/0669 , H04B7/0673 , H04B7/0689
Abstract: PURPOSE: An adaptive transmission antenna diversity device in a mobile communication system and a method therefor are provided to enable a base station to determine a transmission antenna diversity method of a channel signal to be transmitted to a user terminal by the determined method included in feedback information, thereby applying an adaptive transmission antenna diversity to channel environments. CONSTITUTION: A channel estimator(102) receives a channel signal from a base station, and estimates a channel response of the received channel signal. A determiner(110) calculates channel speed of a received channel by using the estimated channel response, and determines a transmission antenna diversity method to be applied when transmitting the channel signal from the base station by corresponding to the calculated channel speed. A feedback information generator(112) generates feedback information including information related to the determined transmission antenna diversity method. The determiner(110) calculates an autocorrelation value of the channel response, and calculates the channel speed with a speed value mapped with the autocorrelation value.
Abstract translation: 目的：提供一种移动通信系统中的自适应发射天线分集装置及其方法，使得基站能够通过包括在反馈信息中的确定方法来确定要发送给用户终端的信道信号的发射天线分集方法 从而将自适应发射天线分集应用于信道环境。 构成：信道估计器（102）从基站接收信道信号，并估计接收到的信道信号的信道响应。 确定器（110）通过使用估计的信道响应来计算接收信道的信道速度，并且通过对应于所计算的信道速度来确定从基站发送信道信号时应用的发送天线分集方法。 反馈信息生成器（112）产生包括与所确定的发送天线分集方法有关的信息的反馈信息。 确定器（110）计算信道响应的自相关值，并且以与自相关值映射的速度值计算信道速度。
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Patent Agency Ranking
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公开(公告)号：KR101931631B1
公开(公告)日：2018-12-21
申请号：KR1020120046514
申请日：2012-05-02
Applicant: 삼성전자주식회사
Abstract: 카메라의 이미지처리장치가 카메라로부터 획득되는 이미지의 자동초점 필터 값을 추출하여 이미지 복잡도에 따른 압축율 조절 값을 결정하는 압축율결정부와, 카메라로부터 획득되는 이미지를 라인 단위로 이미지 처리하는 처리부와, 이미지처리부에서 출력되는 라인 이미지를 압축율 조절값에 의해 압축하는 정지영상코덱으로 구성된다.
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公开(公告)号：KR101916739B1
公开(公告)日：2018-11-09
申请号：KR1020110109807
申请日：2011-10-26
Applicant: 삼성전자주식회사
CPC classification number: H04N21/43615 , H04N21/258 , H04N21/431 , H04N21/4402 , H04N21/4424 , H04N21/4516
Abstract: 본발명은전자기기운용에관한것으로, 특히컨텐츠재생을지원하는복수의전자기기, 상기복수의전자기기중 특정전자기기의컨텐츠재생요청이발생하는경우상기특정전자기기에서데이터처리가능한해당컨텐츠를설정된전자기기에위탁하여데이터처리하도록제어하는것을특징으로하는기기관리장치를포함하는개선된데이터처리를지원하는전자기기운용시스템, 운용시스템지원을위한기기관리장치와단말기및 전자기기운용방법과, 기기관리장치운용방법의구성을개시한다.
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