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公开(公告)号：KR1020090086660A
公开(公告)日：2009-08-14
申请号：KR1020080012058
申请日：2008-02-11
Applicant: 한국과학기술원
IPC: G06F9/38
Abstract: A computer architecture combining a neural network with a parallel processor, and a processing method using the same are provided to enable rapid object recognition in real time at low power through a parallel processing digital processor. A cellular neural network circuit(10) extracts feature points for an image of an object, and converts the extracted feature points into a two-dimensional coordinate value. The cellular neural network circuit outputs the coordinate value in packet type. A parallel processing processor(30) computes SIMD(Single Instruction Multiple Data) between pixels inside an image patch.
Abstract translation: 提供将神经网络与并行处理器组合的计算机体系结构以及使用其的处理方法，以通过并行处理数字处理器实现低功率的实时快速物体识别。 细胞神经网络电路（10）提取对象的图像的特征点，并将所提取的特征点转换为二维坐标值。 细胞神经网络电路输出分组类型的坐标值。 并行处理器（30）计算图像块内的像素之间的SIMD（单指令多重数据）。
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公开(公告)号：KR1020090084591A
公开(公告)日：2009-08-05
申请号：KR1020080010868
申请日：2008-02-01
Applicant: 한국과학기술원
CPC classification number: H04B5/00 , H04B5/0062 , H04B5/0075
Abstract: An apparatus and a method for compensating inductance in inductive coupling communication are provided to shorten the time for inductance compensation and to reduce the circuit size and electric power consumption. A capacitor bank(201) includes a plurality of unit capacitors. Each unit capacitor is deactivated or activated respectively. A decoder(206) deactivates or activates the unit capacitor. An oscillator(202) is oscillated in the fixed frequency according to the capacitance of the capacitor bank and inductance of the inductor. A phase frequency counter(203) compares the oscillation frequency of oscillator with the frequency predetermining. An FSM(Finite State Machine) controller(205) controls the decoder according to the comparison result.
Abstract translation: 提供一种用于补偿电感耦合通信中的电感的装置和方法，以缩短电感补偿的时间并减少电路尺寸和功耗。 电容器组（201）包括多个单位电容器。 每个单位电容器分别失效或激活。 解码器（206）去激活或激活单位电容器。 振荡器（202）根据电容器组的电容和电感的电感以固定频率振荡。 相位频率计数器（203）将振荡器的振荡频率与预定频率进行比较。 FSM（有限状态机）控制器根据比较结果对解码器进行控制。
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公开(公告)号：KR1020090071823A
公开(公告)日：2009-07-02
申请号：KR1020070139733
申请日：2007-12-28
Applicant: 한국과학기술원
CPC classification number: G06F17/16
Abstract: A multi functional operating device and a method thereof are provided to process a matrix operation necessary in a GPU(Graphic Processing Unit) through 2-cycle throughput and process a vector and a transcendental function operation through single-cycle throughput, thereby drastically increasing throughput of the GPU. A log converter(10) converts a value inputted for a 3D graphic operation into a log domain. A PMUL(Programmable Multiplier)(30) is programmed to perform a realizing object operation by the value inputted for a 3D graphic operation and a result value of the first adder. A reverse log converter(50) converts a result value of the second adder into an index domain. A PADD(Programmable Adder)(70) is programmed to perform a realizing object operation by a result value of the reverse log converter and the value inputted for a 3D graphic operation.
Abstract translation: 提供了一种多功能操作装置及其方法，用于通过2周期吞吐量处理GPU（图形处理单元）所需的矩阵运算，并通过单周期吞吐量处理矢量和超越函数运算，从而大大提高了 GPU。 日志转换器（10）将为三维图形操作输入的值转换为对数域。 PMUL（可编程乘法器）（30）被编程为通过为3D图形操作输入的值和第一加法器的结果值来执行实现对象操作。 反向对数转换器（50）将第二加法器的结果值转换成索引域。 PADD（可编程加法器）（70）被编程为通过反向对数转换器的结果值和为3D图形操作输入的值执行实现对象操作。
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公开(公告)号：KR100900497B1
公开(公告)日：2009-06-03
申请号：KR1020070095306
申请日：2007-09-19
Applicant: 한국과학기술원
Abstract: 본 발명은 쿼리 벡터의 엘레멘트 합을 구한 후 그 값이 포함되는 세그먼트 블록의 모든 벡터들에 대해 쿼리 벡터와 거리를 구하여 그 거리를 임의의 최소 거리 값으로 설정하고, 쿼리 벡터의 엘레멘트 합에서 임의의 최소 거리 값을 뺀 값을 포함하는 세그먼트부터 쿼리 벡터의 엘레멘트 합에서 임의의 최소 거리 값을 더한 값을 포함하는 세그먼트의 데이터베이스 구간에 대해서만 벡터 양자화를 수행하여 쿼리 벡터와 최소 거리를 갖는 벡터의 엘레멘트 합 범위를 검출하기 때문에 벡터 양자화를 위한 연산량이 줄어들게 되어 벡터 양자화 수행시간을 줄일 수 있는 벡터 양자화 방법에 관한 것이다.
벡터 양자화, 쿼리 벡터, 데이터베이스 벡터-
公开(公告)号：KR1020080105839A
公开(公告)日：2008-12-04
申请号：KR1020070053923
申请日：2007-06-01
Applicant: 한국과학기술원
Abstract: A memory structure is provided to reduce the overhead of data movement and increase performance of calculation by performing calculation to find with the location address of the local maximum / minimum within a corresponding cycle. In a memory structure, a plurality of first comparators(60) compares a plurality of data in each of a plurality of banks and obtains the maximum value or the minimum value according to a control signal. A second comparator(70) compares data of a plurality of first comparators and obtains the address of the maximum value or the minimum value.
Abstract translation: 提供存储器结构以减少数据移动的开销，并且通过执行计算以增加在相应周期内的局部最大值/最小值的位置寻址来提高计算性能。 在存储器结构中，多个第一比较器（60）比较多个组中的每一个中的多个数据，并根据控制信号获得最大值或最小值。 第二比较器（70）比较多个第一比较器的数据，并获得最大值或最小值的地址。
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Patent Agency Ranking
公开(公告)号：KR100856551B1
公开(公告)日：2008-09-04
申请号：KR1020070053493
申请日：2007-05-31
Applicant: 한국과학기술원
IPC: H04N7/24
CPC classification number: H04N19/117 , H04N19/122 , H04N19/176 , H04N19/86
Abstract: A deblock filter and a deblock filtering method in H.264/AVC are provided to perform low power consumption and high performance filtering calculation by performing a horizontal-vertical interleave deblock filtering which satisfies H.264/AVC video coding standards and minimizing data transaction between an external memory and an inner SRAM. A deblock filter for removing a blocking effect, includes: an input controller which inputs video data to filter from an external memory in the order of luminance component data, blue chrominance component data, and red chrominance component data, and inputs data of sub-block units in sequence from a left column to a right column for a single macro block and from an upper line to a lower line in each column; a filtering magnitude/threshold value generator which calculates a filtering magnitude and a threshold value required for the filtering; an edge filtering calculator which is input with pixel data existing on opposite sides of an edge to filter for a sub-block input by the input controller and performs the filtering; an inner memory 1 and an inner memory 2 which store pixel data of a sub block neighboring left and upper sides of the present sub block to filter; a transpose register 1 and a transpose register 2 which buffer and transpose the video data; and an output controller which stores the data filtered by the edge filtering calculator in the unit of sub block in sequence to an external memory.
Abstract translation: 提供H.264 / AVC中的去块滤波器和去块滤波方法，通过执行满足H.264 / AVC视频编码标准的水平 - 垂直交织去块滤波来最小化数字交换，从而执行低功耗和高性能滤波计算 外部存储器和内部SRAM。 用于去除阻塞效应的去块滤波器包括：输入控制器，其以亮度分量数据，蓝色色度分量数据和红色色度分量数据的顺序从外部存储器输入视频数据进行滤波，并输入子块的数据 从左列到右列的单个单元，用于单个宏块，并且从每列的上一行到下一行; 滤波幅度/阈值发生器，其计算滤波所需的滤波幅度和阈值; 边缘滤波计算器，其输入存在于边缘的相对侧上的像素数据，以过滤由输入控制器输入的子块，并执行滤波; 内部存储器1和内部存储器2，其存储与当前子块的左侧和上侧相邻的子块的像素数据以进行滤波; 转置寄存器1和转置寄存器2，其缓冲和转置视频数据; 以及输出控制器，其将由边缘滤波计算器滤波的数据按子块的顺序存储到外部存储器。
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公开(公告)号：KR1020080073457A
公开(公告)日：2008-08-11
申请号：KR1020070012101
申请日：2007-02-06
Applicant: 한국과학기술원
IPC: G06K19/07 , A61B5/02 , A41D1/02 , A61B5/0205
CPC classification number: A61B5/04087 , A61B5/0006 , A61B5/04085 , A61B5/6802
Abstract: A device for performing contactless communication among clothes is provided to perform the communication and transfer power among the clothes in a contactless mode without any restriction on action or motion of the user wearing the clothes due to a connection line among the clothes. A wire type first inductor(11) is installed to first clothes(2) put on a user. Second clothes are is put on over the first clothes, and a wire type second inductor is installed to the second clothes and performs contactless NFC(Near Field Communication) at a position facing the first inductor. Third clothes(4) are put on over the position of the second inductor, and a wire type third inductor(10) is installed to the third clothes and performs the contactless NFC at the position facing the second inductor. The first clothes are underwear directly contacting with a body, and the first inductor is connected to a sensor or actuator network(13) requiring a physical touch. The second inductor is connected to a device for routing, processing, or storing data. The third inductor is connected to at least one of a data I/O(Input/Output) device, a communication device, a display device, and a power transferring device.
Abstract translation: 提供一种用于在衣服之间进行非接触式通信的装置，以无接触模式在衣服之间进行通信和传送功能，而不会因衣服之间的连接线而穿着衣服的用户的动作或动作受到任何限制。 第一个衣服（2）安装在用户上的线型第一电感器（11）。 将第二件衣服放在第一件衣服上，并且在第二件衣服上安装线型第二电感器，并且在面向第一电感器的位置处执行非接触式NFC（近场通信）。 将第三件衣服（4）放在第二电感器的位置上，并且在第三件衣服上安装线型第三电感器（10），并在面向第二电感器的位置处执行非接触式NFC。 第一件衣服是与身体直接接触的内衣，并且第一电感器连接到需要物理触摸的传感器或致动器网络（13）。 第二电感器连接到用于路由，处理或存储数据的设备。 第三电感器连接到数据I / O（输入/输出）装置，通信装置，显示装置和电力传送装置中的至少一个。
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公开(公告)号：KR100649111B1
公开(公告)日：2006-11-27
申请号：KR1020050087788
申请日：2005-09-21
Applicant: 한국과학기술원
Abstract: A calculation apparatus and a method thereof in a 3-D(Dimensional) graphic system are provided to convert all the calculation into the log domain and perform a single-pass process. The first adder(10) adds up the values to perform the 3-D graphic calculation. A log converter(20) converts the values for the 3-D graphic calculation into the log domain respectively. A shifter(40) shifts the resulting values of the log converter. A multiplier multiplies the resulting values of the log converter respectively. A CSA(Carry Save Adder) tree(30) performs a carry calculation of the resulting values of the multiplier and the input coefficient. The second adder(50) adds up the resulting values of the multiplier and CSA.
Abstract translation: 提供了一种三维（三维）图形系统中的计算装置及其方法，以将所有计算转换为对数域并执行单程处理。 第一加法器（10）将这些值相加以执行三维图形计算。 日志转换器（20）分别将三维图形计算的值转换为日志域。 移位器（40）移动对数转换器的结果值。 乘法器分别乘以对数转换器的结果值。 CSA（进位保存加法器）树（30）执行乘数和输入系数的结果值的进位计算。 第二加法器（50）将乘数和CSA的结果值相加。
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公开(公告)号：KR1020060008017A
公开(公告)日：2006-01-26
申请号：KR1020040057659
申请日：2004-07-23
Applicant: 한국과학기술원
Abstract: 본 발명은 텍스쳐 캐쉬를 갖는 휴대용 단말기의 텍스쳐 매핑방법에 관한 것으로서, 하드웨어적인 구조의 변경없이 텍스쳐 메모리의 맵을 변경하고 어드레스 비트의 위치를 바꿔 하드웨어적인 오버헤드 없이 어드레스를 변환하여 텍스쳐 이미지를 텍스쳐 메모리에 저장함으로써 더 적은 미스율과 더 작은 텍스쳐 캐쉬 사이즈 및 캐쉬 라인 사이즈로 텍스쳐 매핑을 더욱 저 전력으로 구현하여 3차원 그래픽 전체의 파워를 낮추어 휴대용 기기에서도 적용할 수 있는 이점이 있다.
렌더링, 텍스쳐, 매핑, 캐쉬, 휴대용, 저전력, 그래픽, 미스율-
公开(公告)号：KR1020050092632A
公开(公告)日：2005-09-22
申请号：KR1020040017745
申请日：2004-03-16
Applicant: 한국과학기술원
IPC: H04L12/28
CPC classification number: Y02D50/30 , H04L49/101 , H04L49/30
Abstract: 본 발명은 저전력 크로스바 스위치에 관한 것으로서, 전체 크로스바 스위치를 다수개의 작은 그룹으로 분리시키고 각 그룹으로 입력되는 입력신호와 각 그룹에서 출력되는 출력신호를 스케줄러의 제어신호에 의해 실제로 데이터가 스위칭되는 그룹만이 활성화되도록 제어함으로써 구동부하를 각 그룹으로 한정하여 전력소모를 줄일 뿐만 아니라 동작속도를 향상시킬 수 있는 이점이 있다.
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