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公开(公告)号：US20240096285A1
公开(公告)日：2024-03-21
申请号：US18358752
申请日：2023-07-25
Applicant: Apple Inc.
Inventor： Alper Ozgurluk , Andrew Lin , Cheuk Chi Lo , Chun-Ming Tang , Shinya Ono , Chun-Yao Huang
IPC: G09G3/3258 , G09G3/3266 , G09G3/3291
CPC classification number: G09G3/3258 , G09G3/3266 , G09G3/3291 , G09G2300/0842 , G09G2320/0233 , G09G2320/0247
Abstract: A display may include an array of pixels. A pixel can include an organic light-emitting diode, up to three thin-film transistors, and up to two capacitors. The pixel can include a drive transistor, an emission transistor, and a select transistor. The select transistor can be used to apply a reference voltage to the gate of the drive transistor during a global reset phase and during a global threshold voltage sampling phase and can also be used to apply a data voltage to the gate of the drive transistor during a data programming phase. The drive transistor can receive a power supply voltage that toggles between a low voltage during the global reset phase and a high voltage during other phases of operation. Configured and operated in this way, the pixel need not include separate dedicated anode reset and initialization transistors.
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公开(公告)号：US11309372B2
公开(公告)日：2022-04-19
申请号：US16604491
申请日：2018-04-27
Applicant: Apple Inc.
Inventor： Jaein Choi , Andrew Lin , Cheuk Chi Lo , Chun-Yao Huang , Gloria Wong , Hairong Tang , Hitoshi Yamamoto , James E. Pedder , KiBeom Kim , Kwang Ohk Cheon , Lei Yuan , Michael Slootsky , Rui Liu , Steven E. Molesa , Sunggu Kang , Wendi Chang , Chun-Ming Tang , Cheng Chen , Ivan Knez , Enkhamgalan Dorjgotov , Giovanni Carbone , Graham B. Myhre , Jungmin Lee
Abstract: An organic light-emitting diode (OLED) display may have an array of organic light-emitting diode pixels that each have OLED layers interposed between a cathode and an anode. Voltage may be applied to the anode of each pixel to control the magnitude of emitted light. The conductivity of the OLED layers may allow leakage current to pass between neighboring anodes in the display. To reduce leakage current and the accompanying cross-talk in a display, the pixel definition layer may disrupt continuity of the OLED layers. The pixel definition layer may have a steep sidewall, a sidewall with an undercut, or a sidewall surface with a plurality of curves to disrupt continuity of the OLED layers. A control gate that is coupled to a bias voltage and covered by gate dielectric may be used to form an organic thin-film transistor that shuts the leakage current channel between adjacent anodes on the display.
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公开(公告)号：US11210990B2
公开(公告)日：2021-12-28
申请号：US16325260
申请日：2017-08-15
Applicant: Apple Inc.
Inventor： Ivan Knez , Cheuk Chi Lo , Akira Matsudaira , Chun-Yao Huang , Giovanni Carbone , Paolo Sacchetto , Chaohao Wang , Sheng Zhang , Adam Adjiwibawa
Abstract: An electronic device may have a display and a gaze tracking system. The electronic device may display images on the display that have a higher resolution in a portion of the display that overlaps a gaze location than other portions of the display. Timing controller circuitry and column driver circuitry may include interpolation and filter circuitry. The interpolation and filter circuitry may be used to perform nearest neighbor interpolation and two-dimensional spatial filtering on low resolution image data. Display driver circuitry may be configured to load higher resolution data into selected portions of a display. The display driver circuitry may include low and high resolution image data buffers and configurable row driver circuitry. Block enable transistors may be included in a display to allow selected blocks of pixels to be loaded with high resolution image data.
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公开(公告)号：US20210304682A1
公开(公告)日：2021-09-30
申请号：US17196759
申请日：2021-03-09
Applicant: Apple Inc.
Inventor： Bilin Wang , Tien-Chien Kuo , Kanghoon Jeon , Chun-Yao Huang
IPC: G09G3/3291 , G09G3/36 , G09G5/397
Abstract: A display system may include a memory external to a pixel that stores a first digital data value, a memory internal to the pixel that stores a second digital data signal, where a combination of the first digital data signal and the second digital data signal may indicate a target gray level assigned to the pixel for a particular image frame. The pixel may be driven for a first duration of time according to the first digital data signal and for a second duration of time according to the second digital data signal.
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公开(公告)号：US20190180672A1
公开(公告)日：2019-06-13
申请号：US16325260
申请日：2017-08-15
Applicant: Apple Inc.
Inventor： Ivan Knez , Cheuk Chi Lo , Akira Matsudaira , Chun-Yao Huang , Giovanni Carbone , Paolo Sacchetto , Chaohao Wang , Sheng Zhang , Adam Adjiwibawa
Abstract: An electronic device may have a display and a gaze tracking system. The electronic device may display images on the display that have a higher resolution in a portion of the display that overlaps a gaze location than other portions of the display. Timing controller circuitry and column driver circuitry may include interpolation and filter circuitry. The interpolation and filter circuitry may be used to perform nearest neighbor interpolation and two-dimensional spatial filtering on low resolution image data. Display driver circuitry may be configured to load higher resolution data into selected portions of a display. The display driver circuitry may include low and high resolution image data buffers and configurable row driver circuitry. Block enable transistors may be included in a display to allow selected blocks of pixels to be loaded with high resolution image data.
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Patent Agency Ranking
公开(公告)号：US10210830B2
公开(公告)日：2019-02-19
申请号：US15631410
申请日：2017-06-23
Applicant: Apple Inc.
Inventor： Byung Duk Yang , Szu-Hsien Lee , Kyung-Wook Kim , Shih Chang Chang , Chun-Yao Huang , Hao-Lin Chiu
IPC: G09G3/36 , G02F1/1368 , G02F1/1362 , H01L23/528 , H01L23/522 , H01L27/12 , G02F1/1345 , G06F3/041 , G06F3/044 , G09F9/30 , G02F1/1333 , G02F1/1343
Abstract: A display may have an array of pixels arranged in rows and columns. Each pixel may have a transistor for controlling the amount of output light associated with that pixel. The transistors may be thin-film transistors having active areas, first and second source-drain terminals, and gates. Gate lines may be used to distribute gate control signals to the gates of the transistors in each row. Data lines that run perpendicular to the gate lines may be used to distribute image data along columns of pixels. The gate lines may be connected to gate line extensions that run parallel to the data lines. The data lines may each overlap a respective one of the gate line extensions. Vias may be used to connect the gate line extensions to the gate lines. The gate line extensions may all have the same length.
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公开(公告)号：US10170072B2
公开(公告)日：2019-01-01
申请号：US14860397
申请日：2015-09-21
Applicant: APPLE INC.
Inventor： Byung Duk Yang , Chun-Yao Huang , Kyung Wook Kim , Patrick B. Bennett , Shih Chang Chang , Wonjae Choi , Hao-Lin Chiu , Kwang Soon Park , Xinyu Zhu
IPC: G09G5/00 , G09G3/20 , G02F1/1345
Abstract: A display device may include pixels and source lines that provide data line signals to the pixels. The display device may also include gate lines that provide gate signals to switches associated with the pixels. The display device may also include vertical gate lines disposed generally parallel to the source lines and coupled to the gate lines at cross point nodes. The display device may also include compensation lines, such that each compensation line is proximate to a respective vertical gate line. The compensation lines may transmit compensation signals having an opposite polarity as compared to respective gate signals to reduce or eliminate a kickback voltage on at least one of the plurality of pixels.
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公开(公告)号：US09847070B2
公开(公告)日：2017-12-19
申请号：US14520797
申请日：2014-10-22
Applicant: Apple Inc.
Inventor： Kwang Soon Park , Chun-Yao Huang , Shih Chang Chang
CPC classification number: G09G3/3688 , G06F3/0412 , G06F3/0416 , G06F3/044 , G09G2300/0814 , G09G2300/0819 , G09G2300/0842 , G09G2310/0267 , G09G2310/0286 , G09G2310/0294 , G09G2310/063 , G09G2310/065 , G09G2310/08 , G09G2320/0209 , G11C19/184
Abstract: A display may have an array of pixels to display images. Gate line driver circuitry may have stages that supply gate line signals. A gate line may be located in each row of the pixels. Each stage may have an output block that produces a respective one of the gate line signals and may have a carry block that separately produces a carry signal that is provided to a later stage in the gate line driver circuitry. A memory may be provided in at least some of the stages to store signals produced by the output blocks during intraframe pausing operations. At the end of an intraframe pause, the stored signals may be used in restarting production of the gate line signals by output blocks in the gate line driver stages. Circuitry may be used to separately reset the output block and suppress carry signal production by the carry block.
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公开(公告)号：US09606382B2
公开(公告)日：2017-03-28
申请号：US14712311
申请日：2015-05-14
Applicant: Apple Inc.
Inventor： Young-Jik Jo , Chun-Yao Huang , Hao-Lin Chiu , Kwang Soon Park , Shih Chang Chang
IPC: G09G3/34 , G02F1/133 , G02F1/1343
CPC classification number: G02F1/13306 , G02F1/134336 , G09G3/3655
Abstract: A display has an array of pixels controlled by display driver circuitry. Gate driver circuitry supplies gate line signals to rows of the pixels. The pixels may be liquid crystal display pixels. Each pixel may have a common electrode voltage terminal. The display may have a transparent conductive film that forms a common electrode voltage layer that overlaps that array and that is shorted to the common electrode voltage terminals of the pixels. Metal common electrode voltage lines may run across the transparent conductive film to reduce resistance. Metal common electrode voltage paths that are coupled to the metal common electrode voltage lines may run along the left and right edge of the display. Common electrode voltage compensation circuits may receive feedback from the metal common electrode voltage paths. There may be two or more common electrode voltage compensation circuits for both the left and right edges of the display.
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公开(公告)号：US20170084247A1
公开(公告)日：2017-03-23
申请号：US14860397
申请日：2015-09-21
Applicant: APPLE INC.
Inventor： Byung Duk Yang , Chun-Yao Huang , Kyung Wook Kim , Patrick B. Bennett , Shih Chang Chang , Wonjae Choi , Hao-Lin Chiu , Kwang Soon Park , Xinyu Zhu
IPC: G09G5/00
CPC classification number: G09G5/003 , G02F2001/13456 , G09G3/20 , G09G2300/0413 , G09G2300/0426 , G09G2300/043 , G09G2300/0819 , G09G2310/0278 , G09G2310/0281 , G09G2320/0204 , G09G2320/0209 , G09G2320/0219 , G09G2330/021
Abstract: A display device may include pixels and source lines that provide data line signals to the pixels. The display device may also include gate lines that provide gate signals to switches associated with the pixels. The display device may also include vertical gate lines disposed generally parallel to the source lines and coupled to the gate lines at cross point nodes. The display device may also include compensation lines, such that each compensation line is proximate to a respective vertical gate line. The compensation lines may transmit compensation signals having an opposite polarity as compared to respective gate signals to reduce or eliminate a kickback voltage on at least one of the plurality of pixels.
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