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    METHOD, SYSTEM, AND DEVICE FOR MANAGING SERVER HARDWARE RESOURCES IN A CLOUD SCHEDULING ENVIRONMENT
    61.
    发明申请
    METHOD, SYSTEM, AND DEVICE FOR MANAGING SERVER HARDWARE RESOURCES IN A CLOUD SCHEDULING ENVIRONMENT 审中-公开
    用于管理云计算环境中的服务器硬件资源的方法，系统和设备

    公开(公告)号：US20160164963A1

    公开(公告)日：2016-06-09

    申请号：US14961219

    申请日：2015-12-07

    Applicant: Intel Corporation

    Inventor： Mrittika Ganguli ,  Mohan J. Kumar ,  Deepak S. Vembar ,  Jaiber J. John

    IPC: H04L29/08 ,  H04L12/24

    CPC classification number: H04L67/1014 ,  G06F9/5072 ,  H04L41/12 ,  H04L41/5058 ,  H04L41/5096 ,  H04L67/1002

    Abstract: A method, system, and device for managing hardware resources in a cloud scheduling environment includes a zone controller. The zone controller can manage groups of node servers in a cloud datacenter using a checkin service. The checkin service allows server groups to be created automatically based on one or more hardware characteristics of the node servers, server health information, workload scheduling or facilities management parameters, and/or other criteria.

    Abstract translation: 用于在云计划环境中管理硬件资源的方法，系统和设备包括区域控制器。 区域控制器可以使用签入服务来管理云数据中心中的节点服务器组。 签入服务允许基于节点服务器的一个或多个硬件特征，服务器健康信息，工作负载调度或设施管理参数和/或其他准则自动创建服务器组。

    Memory allocation for virtual machines using memory map
    62.
    发明授权
    Memory allocation for virtual machines using memory map 有权
    使用内存映射的虚拟机的内存分配

    公开(公告)号：US09015523B2

    公开(公告)日：2015-04-21

    申请号：US13722499

    申请日：2012-12-20

    Applicant: Intel Corporation

    Inventor： Sudip S. Chahal ,  Mohan J. Kumar ,  Don G. Meyers ,  David Stanasolovich ,  Joshua Boelter

    IPC: G06F11/00 ,  G06F9/455 ,  G06F9/50

    CPC classification number: G06F9/45533 ,  G06F9/45558 ,  G06F9/50 ,  G06F9/5016 ,  G06F12/06 ,  G06F2009/45583 ,  G06F2212/152

    Abstract: Apparatuses and methods associated with memory allocations for virtual machines are disclosed. In embodiments, an apparatus may include a processor; a plurality of memory modules; and a memory controller configured to provide a layout of the memory modules. The apparatus may further include a VMM configured to be operated by the processor to manage execution of a VM by the processor including selective allocation of the memory modules to the VM using the layout of the memory modules provided to the VMM by the memory controller. Other embodiments may be described and claimed.

    Abstract translation: 公开了与虚拟机的存储器分配相关联的装置和方法。 在实施例中，装置可以包括处理器; 多个存储器模块; 以及存储器控制器，被配置为提供所述存储器模块的布局。 该设备可以进一步包括被配置为由处理器操作以管理由处理器执行VM的VMM，包括使用由存储器控制器提供给VMM的存储器模块的布局来将存储器模块选择性地分配给VM。 可以描述和要求保护其他实施例。

    SECURE ERROR HANDLING
    63.
    发明申请
    SECURE ERROR HANDLING 有权
    安全错误处理

    公开(公告)号：US20140237299A1

    公开(公告)日：2014-08-21

    申请号：US13997301

    申请日：2011-12-29

    Applicant: INTEL CORPORATION

    Inventor： Murugasamy Nachimuthu ,  Mohan J. Kumar ,  Theodros Yigzaw ,  Jose A. Vargas ,  Rajendra Kuramkote

    IPC: G06F11/07

    CPC classification number: G06F11/0772 ,  G06F11/0745 ,  G06F11/3664 ,  G06F21/57

    Abstract: Various embodiments are described herein. Some embodiments include an Operating System and a platform. The platform includes a processor having an error register. The Operating System can write to the error register only via the platform in a secure manner (for example, using platform firmware). Other embodiments are described and claimed.

    Abstract translation: 本文描述了各种实施例。 一些实施例包括操作系统和平台。 该平台包括具有错误寄存器的处理器。 操作系统只能通过平台以安全的方式（例如使用平台固件）写入错误寄存器。 描述和要求保护其他实施例。

    CLUSTER WIDE REBUILD REDUCTION AGAINST STORAGE NODE FAILURES
    66.
    发明申请
    CLUSTER WIDE REBUILD REDUCTION AGAINST STORAGE NODE FAILURES 有权

    公开(公告)号：US20230013798A1

    公开(公告)日：2023-01-19

    申请号：US17936201

    申请日：2022-09-28

    Applicant: Intel Corporation

    Inventor： Anjaneya Reddy Chagam Reddy ,  Mohan J. Kumar

    IPC: G06F11/20

    Abstract: Systems, apparatuses and methods may provide for technology that detects a first failure in a first storage server, wherein the first storage server is connected to a first non-volatile memory (NVM) via a switch, selects a second storage server that is connected to the first NVM via the switch, wherein the first storage server and the second storage server are in a storage cluster, and configures the second storage server to host first data resident on the first NVM, wherein configuring the second storage server to host the first data bypasses a cluster-wide rebalance of the storage cluster.

    OUT-OF-BAND MANAGEMENT OF FPGA BITSTREAMS
    67.
    发明申请
    OUT-OF-BAND MANAGEMENT OF FPGA BITSTREAMS 有权

    公开(公告)号：US20220329474A1

    公开(公告)日：2022-10-13

    申请号：US17702707

    申请日：2022-03-23

    Applicant: Intel Corporation

    Inventor： Murugasamy K. Nachimuthu ,  Mohan J. Kumar

    IPC: H04L41/046 ,  G06F15/78 ,  H04L41/0896 ,  H04L9/08 ,  G06F30/34

    Abstract: Mechanisms for out-of-band (OOB) management of Field Programmable Gate Array (FPGA) bitstreams and associated methods, apparatus, systems and firmware. Under a first OOB mechanism, a management component, such as a baseband management controller (BMC) is coupled to a processor including an agent in a compute node that includes an FGPA. An FPGA bitstream file is provided to the BMC, and the agent reads the file from the BMC and streams the FPGA bitstream contents in the file to the FPGA to program it. Under second and third OOB mechanisms, a pointer to an FPGA bitstream file that identifies the location of the file that is accessible via a network or fabric is provided to the BMC or other management entity. The BMC/management entity forwards the pointer to BIOS running on the compute node or an agent on the processor. The BIOS or agent then uses the pointer to retrieve the FPGA bitstream file via the network or fabric, as applicable, and streams the FPGA bitstream to the FPGA to program it.

    Networked shuffle storage
    68.
    发明授权
    Networked shuffle storage 有权

    公开(公告)号：US11194522B2

    公开(公告)日：2021-12-07

    申请号：US16634436

    申请日：2017-08-16

    Applicant: Intel Corporation

    Inventor： Xiao Hu ,  Huan Zhou ,  Sujoy Sen ,  Anjaneya R. Chagam Reddy ,  Mohan J. Kumar ,  Chong Han

    IPC: G06F3/06 ,  G06F16/23

    Abstract: Apparatuses for computing are disclosed herein. An apparatus may include a set of data reduction modules to perform data reduction operations on sets of (key, value) data pairs to reduce an amount of values associated with a shared key, wherein the (key, value) data pairs are stored in a plurality of queues located in a plurality of solid state drives remote from the apparatus. The apparatus may further include a memory access module, communicably coupled to the set of data reduction modules, to directly transfer individual ones of the sets of queued (key, value) data pairs from the plurality of remote solid state drives through remote random access of the solid state drives, via a network, without using intermediate staging storage. Other embodiments may be disclosed or claimed.

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