公开(公告)号：BR9704890A

公开(公告)日：1998-11-24

申请号：BR9704890

申请日：1997-09-26

Applicant: MOTOROLA INC

Inventor： LAROSA CHRISTOPHER P ,  CARNEY MICHAEL J ,  LING FUYUN ,  BECKER CHRISTOPHER J

IPC: H04B1/707 ,  H04B7/005 ,  H04B7/26 ,  H04J11/00 ,  H04J13/00 ,  H04L25/02 ,  H04Q7/30

Abstract: By time-sharing demodulator hardware between a primary data path (165), a power control data path (161), and a received signal strength indicator (RSSI) path (163), an entire power control data path (161) can be implemented in a demodulator (140) of a spread spectrum subscriber unit receiver with a low increase in gate count. The primary data path (165) and the power control data path (161) time-share a complex conjugate generator (270), a complex multiplier (280), and a real component extractor (290). Due to timing requirements, though, the channel estimation filter (240) of the primary data path cannot be time-shared with the power control data path. Instead, dynamic coefficient scaling is added to an infinite-duration impulse response (IIR) filter in the RSSI path (163) so that the IIR filter (250) with dynamic coefficient scaling can be time-shared between the RSSI path (163) and the power control data path (161).

公开(公告)号：CA2120094A1

公开(公告)日：1994-10-09

申请号：CA2120094

申请日：1994-03-28

Applicant: MOTOROLA INC

Inventor： LAROSA CHRISTOPHER P ,  CARNEY MICHAEL J

IPC: H03L7/085 ,  G01R29/02 ,  H04B14/02 ,  H04L27/233 ,  H03M1/12 ,  H04B1/40 ,  H03D3/00

Abstract: A radio receiver directly digitizes the phase of an intermediate frequency (IF) signal with a desired resolution. The frequency of the reference oscillator in the direct phase digitizer is reduced when compared to the frequency previously required for the same resolution. The reduction in the reference oscillator frequency is accomplished by differentiating between IF zero-crossings that occur during the first half of a reference oscillator cycle and zero-crossings which occur during the second half of the reference oscillator cycle. The apparatus utilizes 2 zero-crossing detectors, the first zero-crossing detector is driven by a positive edge of the reference oscillator signal and the second zero-crossing detector is driven by a negative edge of the reference oscillator signal. Depending upon the alignment of the negative edge zero-crossing indicator and the positive edge zero-crossing indicator, the N-bit phase signal is modified or shifted by one-half a phase sector.

公开(公告)号：GB2273227A

公开(公告)日：1994-06-08

申请号：GB9322407

申请日：1993-01-21

Applicant: MOTOROLA INC

Inventor： LAROSA CHRISTOPHER P ,  CARNEY MICHAEL J

IPC: H03D3/00 ,  H03D1/04 ,  H04B7/01 ,  H04B7/26 ,  H04L27/01 ,  H04L27/22

Abstract: The present disclosure includes a discussion of a method of compensating for distortion of a received signals phase. The distortion is caused by the asymmetrical characteristics of a voltage limiter (301). This compensation allows the received signal (115) to be sampled at the positive and negative zero-crossings reducing the requirements of a local oscillator in a radiotelephone system. First, the phase of the received signal is sampled at the positive and negative zero-crossings, forming a corresponding positive-crossing (401) and a negative-crossing (407) phase value for the received signal. Second, the negative-crossing and positive-crossing phase values are combined, forming a first difference signal (409). Third, an estimated error signal (417) is formed using the first difference signal. Fourth, the estimated error signal is combined (419) with the positive or negative zero-crossing phase signals, substantially eliminating the asymmetrical distortion.

公开(公告)号：CZ256293A3

公开(公告)日：1994-05-18

申请号：CZ256293

申请日：1993-01-25

Applicant: MOTOROLA INC

Inventor： LAROSA CHRISTOPHER P ,  CARNEY MICHAEL J

IPC: H04Q7/38 ,  H04J3/00 ,  H04L7/02 ,  H04L7/033 ,  H04L7/04 ,  H04L7/08 ,  H04L7/10 ,  H04L27/22 ,  H04L7/00 ,  H03D3/24

Abstract: The present disclosure includes a discussion of a decision-directed clock recovery system which includes circuitry to prevent false-locking and accelerate acquisition on a known symbol patterns. The clock recovery system has at least two control circuits. Each control circuit has an effective bandwidth and also generates a clock signal. The clock recovery system samples the received data signal using the two clock signals, forming a corresponding first and second sampled signal. The sampled signals are used to generate corresponding symbol decisions. The symbol decision signals are processed to detect a known symbol pattern in the received data signal. Upon detection of the known bit sequence, the characteristics of the clock recovery system are modified, namely, the effective bandwidth of the control circuits are modified.

公开(公告)号：AU4927393A

公开(公告)日：1994-04-26

申请号：AU4927393

申请日：1993-09-16

Applicant: MOTOROLA INC

Inventor： LAROSA CHRISTOPHER P ,  CARNEY MICHAEL J

IPC: H04B7/26 ,  H04B1/10 ,  H04B3/46 ,  H04B17/00 ,  H04L27/18 ,  G06F11/00 ,  G11C29/00

公开(公告)号：ITRM920662A1

公开(公告)日：1994-03-11

申请号：ITRM920662

申请日：1992-09-11

Applicant: MOTOROLA INC

Inventor： CARNEY MICHAEL J ,  LAROSA CHRISTOPHER P

IPC: H04B20060101 ,  H04B7/08 ,  H04B7/26

公开(公告)号：GB2269284A

公开(公告)日：1994-02-02

申请号：GB9316175

申请日：1992-10-13

Applicant: MOTOROLA INC

Inventor： LAROSA CHRISTOPHER P ,  CARNEY MICHAEL J

IPC: H03D3/00 ,  H04L7/033 ,  H04L27/233 ,  H03D3/18 ,  H04L27/22

Abstract: The present disclosure includes a discussion of a direct phase digitizing apparatus (303) for use in a radiotelephone (101). The direct phase digitizing apparatus (303) accepts a first analog signal (309) having a phase, a voltage range and a first frequency. First, the direct phase digitizer generates an estimated phase map (611) having a second frequency and N-bits of resolution. Second, the direct phase digitizer detects a predetermined-voltage crossing of the first analog signal (409). Third, using the predetermined-voltage crossings, the direct phase digitizer samples the estimated phase map. Fourth, a digital phase signal (623) is generated using the samples of the estimated phase map.

公开(公告)号：FI935261A0

公开(公告)日：1993-11-26

申请号：FI935261

申请日：1993-11-26

Applicant: MOTOROLA INC

Inventor： LAROSA CHRISTOPHER P ,  CARNEY MICHAEL J

IPC: H03D3/00 ,  H03D1/04 ,  H04B7/01 ,  H04B7/26 ,  H04L27/01 ,  H04B

Abstract: A method of and apparatus for compensating a received signal's phase compensates for the distortion caused by the asymmetrical characteristics of a voltage limiter. This compensation allows the received signal to be sampled at the positive and negative zero-crossings reducing the requirements of a local oscillator in a radiotelephone system. First, the phase of the received signal is sampled at the positive and negative zero-crossings, forming a corresponding positive-crossing and a negative-crossing phase value for the received signal. Second, the negative-crossing and positive-crossing phase values are combined, forming a first difference signal. Third, an estimated error signal is formed using the first difference signal. Fourth, the estimated error signal is combined with the positive or negative zero-crossing phase signals, substantially eliminating the asymmetrical distortion.

公开(公告)号：FI933598A

公开(公告)日：1993-08-13

申请号：FI933598

申请日：1993-08-13

Applicant: MOTOROLA INC

Inventor： LAROSA CHRISTOPHER P ,  CARNEY MICHAEL J

IPC: H03D3/00 ,  H04L7/033 ,  H04L27/233

Abstract: This patent application discusses a direct phase digitizing apparatus (303) for use in a radiotelephone (101). The direct phase digitizing apparatus (303) accepts a first analog signal (309) having a phase, a voltage range and a first frequency. First, the direct phase digitizer generates an estimated phase map (611) having a second frequency and N-bits of resolution. Second, the direct phase digitizer detects a predetermined-voltage crossing (409) of the first analog signal (309). Third, using the predetermined-voltage crossings, the direct phase digitizer samples the estimated phase map. Fourth, a digital phase signal (623) is generated using the samples of the estimated phase map.

公开(公告)号：FR2685148A1

公开(公告)日：1993-06-18

申请号：FR9211109

申请日：1992-09-17

Applicant: MOTOROLA INC

Inventor： LAROSA CHRISTOPHER P ,  CARNEY MICHAEL J

IPC: H04B7/08 ,  H04B7/26 ,  H04B1/38

Abstract: A phase combining method and apparatus for use in a diversity reception radiotelephone is described. The phase combining method and apparatus is a hybrid diversity technique which combines elements of maximal ratio combining (MRC) and level comparison selection diversity, which results in a simple and effective implementation of a diversity receiver with superior performance. The diversity receiver demodulates the received signals, extracts the phase, forming two phase signals. Then, the two phase signals are combined to form a third phase signal. One of the three phase signals is selected to be used for interpretation of a symbol in the Quadrature Phase Shift Keying (QPSK) constellation. The selection process is based on the received signal strength of the received signals.