EFFICIENT DIGITAL FILTER USING STANDBY COUPLING COEFFICIENT

    公开(公告)号:JPH10126219A

    公开(公告)日:1998-05-15

    申请号:JP27940597

    申请日:1997-09-29

    Applicant: MOTOROLA INC

    Abstract: PROBLEM TO BE SOLVED: To provide the digital filter in which the number of gates and a power consumption level are reduced. SOLUTION: The digital filter, suitably used for a code division multiple access or other bust mode communication equipment, uses a standby coupling filter coefficient to reduce the complexity of the filter and the power consumption. The digital filter includes a coefficient storage circuit 216 that stores the standby coupling filter coefficient, a selection circuit 212 that responds to an input signal to select a proper standby coupling filter coefficient and a coupling circuit 214, that couples proper standby coupling filter coefficients to generate a filter signal.

    Linear filter equalizer
    2.
    发明专利
    Linear filter equalizer 审中-公开
    线性过滤器均衡器

    公开(公告)号:JP2005323384A

    公开(公告)日:2005-11-17

    申请号:JP2005136832

    申请日:2005-05-10

    CPC classification number: H03H21/0012 H03H2021/0083

    Abstract: PROBLEM TO BE SOLVED: To provide an apparatus (100) and a method (400) suitable for use in a communication device by equalizing an input signal received to mitigate multipath distortion effects present in the input signal in the communication device.
    SOLUTION: A first filter (102) samples an input signal (104) and generates a first filter output (106) based upon the sampled input signal and a filter coefficient array (108). An error signal (112) is then generated based upon a difference between the first filter output (106) and a desired signal (114), and the filter coefficient array (108) is updated based upon a product of the error signal (112) and an adaptation constant (118). A second filter (126) samples a delayed input signal (124) and generates a second filter output (128) based upon the sampled delayed input signal and the filter coefficient array (108).
    COPYRIGHT: (C)2006,JPO&NCIPI

    Abstract translation: 要解决的问题:提供一种适于在通信设备中使用的装置(100)和方法(400),其通过均衡接收的输入信号来减轻通信设备中的输入信号中存在的多径失真效应。 解决方案:第一滤波器(102)对输入信号(104)进行采样,并基于采样的输入信号和滤波器系数阵列(108)产生第一滤波器输出(106)。 然后基于第一滤波器输出(106)和期望信号(114)之间的差异产生误差信号(112),并且基于误差信号(112)的乘积来更新滤波器系数阵列(108) 和适应常数(118)。 第二滤波器(126)对延迟的输入信号(124)进行采样,并基于采样的延迟输入信号和滤波器系数阵列(108)产生第二滤波器输出(128)。 版权所有(C)2006,JPO&NCIPI

    LAKE RECEIVER AND FINGER MANAGING METHOD FOR SPREAD SPECTRUM COMMUNICATION

    公开(公告)号:JPH11168448A

    公开(公告)日:1999-06-22

    申请号:JP27432698

    申请日:1998-09-10

    Applicant: MOTOROLA INC

    Abstract: PROBLEM TO BE SOLVED: To provide a lake receiver and a finger managing method improved for providing the merit of path diversity even when the interval of multipath radio waves is shorter than one-chip time. SOLUTION: A lake receiver 112 is provided with plural fingers 122, 124 and 128. Each finger is provided with a demodulator for demodulating the radio waves of multiple path signals and a time tracking circuit for controlling the timewise position of the finger based on the timewise position of the radio wave. Low delay spreading conditions are detected, the positions of two adjacent fingers are controlled and fingers more than two are prevented from being converged around a common timewise position. By maintaining the timing intervals of fingers, even during low delay spreading conditions, the path diversity is effectively utilized by the lake receiver 112 and the performance of the receiver is improved.

    METHOD AND DEVICE TO ACQUIRE PILOT SIGNAL BY CDMA RECEIVER

    公开(公告)号:JPH10257022A

    公开(公告)日:1998-09-25

    申请号:JP5017998

    申请日:1998-02-16

    Applicant: MOTOROLA INC

    Abstract: PROBLEM TO BE SOLVED: To provide a method and a CDMA receiver to acquire a pilot signal. SOLUTION: A retrieval receiver 114 is provided with a sample buffer 202 that uses a real time clock to store a loaded signal sample. A real time linear sequence generator (RT LSG) 206 stores an initial state and the time is counted by using a real time clock. The content of the RT SLG is loaded in a non-real time linear sequence generator (NRT LSG) 208 when sample processing is started. The sample is correlated by using the non-real time clock to make the signal processing independent of the chip speed. An analog front end reduces the power for the non-real time processing or is tuned to other frequency.

    CDMA POWER CONTROL CHANNEL ESTIMATION UTILIZING DYNAMIC COEFFICIENT SCALING

    公开(公告)号:JPH10242906A

    公开(公告)日:1998-09-11

    申请号:JP27819397

    申请日:1997-09-25

    Applicant: MOTOROLA INC

    Abstract: PROBLEM TO BE SOLVED: To make it possible to construct the whole power control data route by a demodulator in a spread spectrum subscriber's unit receiver only by the less increment of the number of gates by executing the time sharing of demodulator hardware among a main data route and the power control data route and a receiving signal strength indicator(RSSI) route. SOLUTION: The main data route 165 and the power control data route 161 execute time-sharing among a complex conjugate generator 270, a complex multiplier 280 and a real number component extractor 290. Provided that a channel estimation filter 240 in the route 165 can not execute time sharing with the route 161 to hold a timing condition. Instead of the state, dynamic coefficient scaling is added to an infinite impulse response(IIR) filter 250 and the IIR filter 250 having the dynamic coefficient scaling can execute time sharing between the RSSI route 163 and the route 161.

    Equaliser comprising a first filter for adapting filter coefficients and a second filter for equalising data using the adapted coefficients

    公开(公告)号:GB2414147A

    公开(公告)日:2005-11-16

    申请号:GB0508309

    申请日:2005-04-25

    Applicant: MOTOROLA INC

    Abstract: An apparatus (100) and a method (400) suitable for use in a communication device by equalizing an input signal received to mitigate multipath distortion effects present in the input signal in the communication device are provided. A first filter (102) samples the input signal (104) and generates a first filter output (106) based upon the sampled input signal and a filter coefficient array (108). An error signal (112) is then generated based upon a difference between the first filter output (106) and a desired signal (114), and the filter coefficient array (108) is updated based upon a product of the error signal (112) and an adaptation constant (118). A second filter (126) samples a delayed input signal (124) and generates a second filter output (128) based upon the sampled delayed input signal and the filter coefficient array (108). The duration of the delay (120) applied to the input signal or/and the adaptation "constant" may be varied based upon a rate of change of the input signal.

    7.
    发明专利
    未知

    公开(公告)号:FR2760157B1

    公开(公告)日:2004-09-10

    申请号:FR9716352

    申请日:1997-12-23

    Applicant: MOTOROLA INC

    Abstract: A searcher receiver (114) includes a sample buffer (202) which stores signal samples loaded using a real time clock. A real time linear sequence generator (RT LSG) (206) stores an initial state and is clocked using the real time clock. The contents of the RT LSG are loaded into a non-real time linear sequence generator (NRT LSG) (208) when sample processing begins Samples are correlated using a non-real time clock to allow signal processing to be uncoupled from the chip rate. The analog front end (108) may be powered down or tuned to another frequency during non-real time processing.

    CDMA power control channel estimation using dynamic coefficient scaling

    公开(公告)号:GB2322773B

    公开(公告)日:2001-09-26

    申请号:GB9719113

    申请日:1997-09-10

    Applicant: MOTOROLA INC

    Abstract: By time-sharing demodulator hardware between a primary data path (165), a power control data path (161), and a received signal strength indicator (RSSI) path (163), an entire power control data path (161) can be implemented in a demodulator (140) of a spread spectrum subscriber unit receiver with a low increase in gate count. The primary data path (165) and the power control data path (161) time-share a complex conjugate generator (270), a complex multiplier (280), and a real component extractor (290). Due to timing requirements, though, the channel estimation filter (240) of the primary data path cannot be time-shared with the power control data path. Instead, dynamic coefficient scaling is added to an infinite-duration impulse response (IIR) filter in the RSSI path (163) so that the IIR filter (250) with dynamic coefficient scaling can be time-shared between the RSSI path (163) and the power control data path (161).

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