公开(公告)号：JPH09167764A

公开(公告)日：1997-06-24

申请号：JP9515996

申请日：1996-04-17

Applicant: SONY CORP

Inventor： MATSUZAWA NOBUYUKI ,  HASEGAWA TOSHIAKI

IPC: H01L21/768 ,  H01L21/312 ,  H01L21/316

Abstract: PROBLEM TO BE SOLVED: To enable insulating film to be stabilized for a long term without causing a void by laminating insulating films made of an organic material on the surface of silicon oxide films after feeding silane coupling agent. SOLUTION: Firstly, the first silicon oxide film 2 is formed on a silicon substrate 1 and after the formation of a wiring pattern 3, the second silicon oxide film 4 is formed. Next, a wafer is spin coated with carbon tetrachloride melted with one wt.% of silane coupling agent. Thus, silane coupling agent is chemically coupled with hydroxyl group on the silicon oxide film surface. Next, an organic insulating film 5 made of amorphous teflon is formed. Later, the third silicon oxide film 6 is formed. In such a constitution, the laminated layer films made of the second silicon oxide film 4, the organic insulating film 5 and the third silicon oxide film 6 are formed into an interlayer insulating film at low dielectric constant due to the existance of the organic insulating film 5.

公开(公告)号：JPH07263442A

公开(公告)日：1995-10-13

申请号：JP7250494

申请日：1994-03-17

Applicant: SONY CORP

Inventor： HASEGAWA TOSHIAKI

IPC: C01G35/00 ,  C23C16/32 ,  C23C16/40 ,  H01L21/316 ,  H01L21/318 ,  H01L21/822 ,  H01L21/8242 ,  H01L27/04 ,  H01L27/10 ,  H01L27/108

Abstract: PURPOSE:To provide a forming method of tantalum based high dielectric material having permitivity higher than Ta2O5, and a tantalum based high dielectric film which can function improve leak current characteristics and withstand voltage characteristics. CONSTITUTION:Tantalum based high dielectric material has the morphology of TaxOyNz, and X, Y and Z satisfy the following relation; X+Y+Z=1, 0.1 =0.4Y+0.6Z. As to the manufacturing method of a high dielectric film, a high dielectric film composed of tantalum based high dielectric material wherein CpmTa(N3)n (Cp is cyclopentane, and m+n=5) is used as raw material is formed on a substratum by using a CVD method. Said material has the morphology of TaxOyNz and X, Y and Z satisfy the above relations.

公开(公告)号：JPH07263431A

公开(公告)日：1995-10-13

申请号：JP7250594

申请日：1994-03-17

Applicant: SONY CORP

Inventor： HASEGAWA TOSHIAKI

IPC: B01J19/08 ,  C23C16/18 ,  C23C16/40 ,  C23C16/50 ,  C23C16/56 ,  H01L21/314 ,  H01L21/316 ,  H01L21/318 ,  H01L21/822 ,  H01L21/8242 ,  H01L27/04 ,  H01L27/108

Abstract: PURPOSE:To provide a method of forming a Ta-containing high dielectric film, which can improve more the leakage characteristics and breakdown strength of the film. CONSTITUTION:A tantalum (Ta)-containing high dielectric film is formed on a base body and thereafter, a plasma treatment is performed on the high dielectric film using gas containing at least nitrogen (N). Or a tantalum (Ta)- containing high dielectric film is formed on a base body by a CVD method using gas containing at least nitrogen (N) and tantalum (Ta)-containing gas as raw gas.

公开(公告)号：JPH0745534A

公开(公告)日：1995-02-14

申请号：JP20843693

申请日：1993-07-30

Applicant: SONY CORP

Inventor： HASEGAWA TOSHIAKI

IPC: H01L21/205

Abstract: PURPOSE:To improve an equipment in the manner in which particles hardly stick on the surface (thin film forming surface) of a wafer. CONSTITUTION:A vertical type CVD equipment 10 is provided with a cylindrical furnace core pipe 12 made of quartz and a ring type heater 14 surrounding the periphery of the furnace core pipe 12. A wafer board 18 made of quartz is arranged in a reaction chamber 16 inside the furnace core pipe 12. A reaction gas introducing inlet 20 is formed on the upper hatch 22 of the furnace core pipe 12 and a gas discharging vent 24 is formed on a lower hatch 26. The wafer board is constituted of a plurality of stays which are vertically stood on the half circumference of a circle whose diameter is a little larger than the diameter of a wafer A, and a nearly ring type shelf part which has an outer shape similar to the wafer A and connects the stays. The wafer A is mounted on the shelf part in the state that the surface vertically faces downward.

公开(公告)号：JPH0745533A

公开(公告)日：1995-02-14

申请号：JP20843593

申请日：1993-07-30

Applicant: SONY CORP

Inventor： HASEGAWA TOSHIAKI

IPC: H01L21/205

Abstract: PURPOSE:To provide a vertical type CVD equipment wherein uniformity of intersurface distribution of film quality is improved and compact structure is realized. CONSTITUTION:A wafer boat 36 in which wafers A are mounted on multistage in the vertical direction is loaded in a furnace core pipe 16, into which reaction gas is introduced. Vapor growth reaction is performed at a high temperature and a thin film is formed on the wafer surface. The wafer boat 36 which is loaded in the equipment is constituted by stacking units 38 which can be divided for each wafer.

公开(公告)号：JPH0745532A

公开(公告)日：1995-02-14

申请号：JP20842993

申请日：1993-07-30

Applicant: SONY CORP

Inventor： HASEGAWA TOSHIAKI

IPC: H01L21/205

Abstract: PURPOSE:To provide a low pressure CVD equipment and a film forming method which are improved so as to form a thin film having uniform quality and thickness throughout a wafer accommodated in a furnace core tube. CONSTITUTION:The title CVD equipment loads a wafer boat, which mounts wafers on a vertical multistage, in a furnace core tube, introduces reaction gas into the furnace core tube, and executes vapor growth reaction under a reduced pressure condition, thereby forming a thin film on the wafer surface. The wafer boat 30 is constituted so as to arrange the wafers in order, in the state that the surface of a first wafer Al and the surface of a second wafer A2 face each other and the rear of the second wafer and the rear A3 of a third wafer face each other. Dilute gas is set for 2000sccm or more, and reaction gas is supplied by a ratio more than or equal to 20% of the dilute gas.

公开(公告)号：JPH06333891A

公开(公告)日：1994-12-02

申请号：JP12130093

申请日：1993-05-24

Applicant: SONY CORP

Inventor： HASEGAWA TOSHIAKI

IPC: B24B37/04 ,  B24B37/30 ,  H01L21/304

Abstract: PURPOSE:To improve a substrate in uniformity of polishing rate by a method wherein polishing plates prescribed in diameter are provided for a single substrate. CONSTITUTION:A wafer 1 is placed on a circular wafer holding table 2, and two polishing plates 6a and 6b provided with polishing pads 5a and 5b at their surfaces respectively are disposed above the wafer holding table 2 in point symmetry about the rotating shaft 3 of the wafer holding table 2, wherein the polishing plates 6a and 6b are rotated respectively. The polishing plates 6a and 6b are possessed of rotating shafts 7a and 7b respectively, and the rotating shafts 7a and 7b are borne by a polishing plate pressing mechanism possessed of a polishing plate with a rotating shaft at its center. The polishing plates 6a and 6b are half or less as large in diameter as the wafer 1 and easily disposed in point symmetry, and the polishing pads 5a and 5b are lessened in pressure difference. By this setup, a wafer can be improved in polishing rate uniformity throughout its surface.

公开(公告)号：JPH06140343A

公开(公告)日：1994-05-20

申请号：JP29008092

申请日：1992-10-28

Applicant: SONY CORP

Inventor： HASEGAWA TOSHIAKI

IPC: C23C16/52 ,  H01L21/205 ,  H01L21/28 ,  H01L21/285

Abstract: PURPOSE:To provide a sidewall heating CVD device, which can form a CVD device uniform in film thickness, using material gas easy to adsorb on the sidewall of a chamber, and a film growth method using its device. CONSTITUTION:In a CVD device, which has a susceptor 1 to place a semiconductor substrate, being arranged inside a reaction chamber 13, a heating means 7 for heating the semiconductor substrate 2 through the susceptor 1, and a material gas supply means 11 for supplying material gas 5 used for forming a film on the semiconductor substrate 2, at least a heating means for maintaining the temperature of the vicinity of the inwall at a specified temperature not less than the boiling point of material gas and not more than the decomposition temperature of material gas is provided at the inwall of the reaction chamber.

公开(公告)号：JPH05144948A

公开(公告)日：1993-06-11

申请号：JP33290791

申请日：1991-11-22

Applicant: SONY CORP

Inventor： HASEGAWA TOSHIAKI

IPC: H01L21/28 ,  H01L21/302 ,  H01L21/3065 ,  H01L21/768

Abstract: PURPOSE:To provide a pretreatment method in a CVD method which can surely remove reaction products an impurities such as AlF3 and Al2O3 produced on the surface of a aluminum wiring when forming a connection hole on an aluminum wiring by the CVD method. CONSTITUTION:A pretreatment method in a chemical vapor growth method which forms a wiring material in an opening part in a chemical vapor growth process after a layer insulating layer is formed on an aluminum wiring and an opening part is formed in the layer insulating layer. (1) Etching treatment including an ashing treatment and a water cleaning treatment is performed for an aluminum wiring before a chemical vapor growth process. (2) The aluminum wiring is etched again in a first stage of the chemical vapor growth process.

公开(公告)号：JPH0529470A

公开(公告)日：1993-02-05

申请号：JP18428191

申请日：1991-07-24

Applicant: SONY CORP

Inventor： HASEGAWA TOSHIAKI

IPC: H01L21/3205 ,  H01L21/768 ,  H01L23/52

Abstract: PURPOSE:To reduce and stabilize the contact resistance between a tungsten plug and lower layer wiring as well as to improve selectivity of a growth of tungsten and a film-forming rate and to reduce a film-forming temperature to ensure the reliability of the lower layer wiring. CONSTITUTION:An SiO2 film 12, a titanium film 13, a TiON film 14, a WSiX film 15, an aluminum (Al-1% of Si) film 16, an antireflection film 17 and an interlayer film 18 are laminated in order on a silicon substrate 11 and an etching is performed until the film 15 is exposed to open a via hole. Then, a tungsten plug 20 is formed in the hole 19 by a silane reduction method. A selective tungsten CVD is performed on the conditions of WF6/SiH4/H2/Ar=10/7/1000/15SCCM, temperature=260 deg.C and pressure=200m Torr. An aluminum fluoride is not produced on the interface between the lower layer wiring (the aluminum film) and the plug 20 and a contact resistance between the lower layer wiring and the plug is stabilized and is brought into a low resistance state.