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公开(公告)号：JPS644106A
公开(公告)日：1989-01-09
申请号：JP15888387
申请日：1987-06-26
Applicant: SONY CORP
Inventor： YAMAMOTO TETSUO , ISHIKAWA FUMIO
Abstract: PURPOSE:To attain high through-rate with low power consumption by using an output of a current detection circuit provided at least one collector of a couple of transistors(TRs) so as to control a current source of an emitter of a relevant TR. CONSTITUTION:A current detection circuit 9 is provided to a collector of a TR 1 and an output of the current detection circuit 9 controls the current source 7. If an input signal Vin at an input terminal 3 rises rapidly, the TR 1 is going to be turned off and the collector current is decreased. It is detected by the current detection circuit 9 to increase the current of the current source 7 thereby preventing the TR 1 from being turned off. Then the potential at a connecting point P changes in following to the input signal Vin and an output signal Vout follows thereto, then the through-rate is increased. Since the current of the current source 7 is increased only at the transient state of the input/output signal, low power consumption and high through-rate are attained.
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公开(公告)号：JPS613522A
公开(公告)日：1986-01-09
申请号：JP12330484
申请日：1984-06-15
Applicant: SONY CORP
Inventor： MAEKAWA TOSHIICHI , ISHIKAWA FUMIO
Abstract: PURPOSE:To reduce power consumption of a clock driver by driving a load with a large current only at the transition period of a pulse to drive a capacitive load such as a CCD image pickup element and driving the load with a minute current at other periods. CONSTITUTION:A voltage Vcc1 is fed to an input terminal 12 of the clock driver at the rising of a CCD vertical register drive pulse, a base current flows to a transistor (TR)5 via a TR1, a resistor 8 and a TR4 by turning on and off Trs 1, 2 to turn on the TR5 thereby discharging the electric charge of a load 7. The TR2 is turned on conversely at the falling a base current flows to a TR6 to turn on via the TR2, the resistor 8 and a TR3, the load 7 is charged and when the load is charged up to a power supply voltage Vcc2, the circuit reaches a balancing state and a current I1 hardly flows.
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Patent Agency Ranking
公开(公告)号：JPS58115693A
公开(公告)日：1983-07-09
申请号：JP21411681
申请日：1981-12-28
Applicant: SONY CORP
Inventor： ISHIKAWA FUMIO
Abstract: PURPOSE:To obtain a high-precision sample holding output by inserting a diode which forms a short circuit between capacitors when a diode bridge turns off to prevent an input signal from appearing at an output terminal during a holding period. CONSTITUTION:When the anode connection point between diode D1 and D3 is at a lower level than the cathode connection point between diodes D2 and D4, the diodes D1-D4 turn off a make to disconnection between an input terminal 10 and an output terminal 11, and charges in a capacitor 12 are held. A pulse voltage applied to terminals 13 and 14, on the other hand, turns on transistors (TR) 15B and 16A and turns off TRs 15A and 16B in a section T1 or turns on the TRs 15A and 16B and turns off the TRs 15B and 16A in a section T2; and those sections are repeated. In the section T2, diodes D5 and D6 turn on to flow a transient current through capacitors 17 and 18 to vary voltage Vc and VD to VA. Thus, voltages at points C and D cancel pulse voltage components appearing input and output terminals through the floating capacties of the diodes D1-D4 due to the voltage fluctuation equally to positively and negaively around VA, to prevent the generation of an error voltage component.
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公开(公告)号：JPS5525233A
公开(公告)日：1980-02-22
申请号：JP9758978
申请日：1978-08-10
Applicant: SONY CORP
Inventor： WATANABE SEIICHI , ISHIKAWA FUMIO , KOMATSU YASUTOSHI
Abstract: PURPOSE:To obtain the intermediate frequency signal output in a good balance without using the phase inverse output transformer and by using a pair of the surface elastic wave filters in which the input/output characteristics features the same phase at one side and the opposite phase at the other each. CONSTITUTION:A pair of output featuring the opposite phase to each other is supplied from double-balance type mixer circuit K to a pair of surface elastic wave filters 31 and 32 possessing the intermediate frequency pass band each. The input/ output characteristics of filters 31 and 32 are selected so that the same phase may be secured at one side and the opposite phase at the other side each, and each output is added together to obtain the intermediate frequency signal. In other words, filter 30 composed of a pair of filters 31 and 32 possesses the function of the intermediate frequency band pass filter plus the function of the phase inverse output transformer which adds the two input signals with phase inversion. Thus the transformer can be omitted.
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公开(公告)号：JPS5488002A
公开(公告)日：1979-07-12
申请号：JP15588877
申请日：1977-12-24
Applicant: SONY CORP
Inventor： ISHIKAWA FUMIO
Abstract: PURPOSE:To simplify the circuit constitution by sharing the tuner input part for both VHF and UHF. CONSTITUTION:Input terminal T1 is earthed via capacity C1 as well as inductances L1-L4, and juntion between L1 and L2 is earthed via variable capacity element VC1 and capacity C2. The junction between VC1 and C2 is connected to output terminal T2 via capacity C3, and the junction between L3 and L4 is connected to terminal T2 via variable capacity element VC2. Then the junction between L2 and L3 is earthed via switching element D which is turned off at the VHFTV signal reception time and turned on at the UHFTV signal reception time respectively. Thus, the ca apacity of VC1 and VC2 varies according to the reception of the TV signal to carry out each tuning.
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公开(公告)号：JPS5487456A
公开(公告)日：1979-07-11
申请号：JP15541977
申请日：1977-12-23
Applicant: SONY CORP
Inventor： ISHIKAWA FUMIO
Abstract: PURPOSE:To obtain a filter which is able to make a changeover between two different passing frequency bands with its circuit constitution simplified, and to switch the band width of the passing frequency band to a different band. CONSTITUTION:Input terminal T1 of high-frequency inter-stage tuning circuit 35 is grounded via capacitor Cs and connected to one terminal of the 1st series circuit of inductances L5 and L6 with the other terminal grounded via the 2nd series circuit of inductances L9 and L10. In addition, the terminal is connected to output terminal T2 via the 3rd series circuit of inductances L7 and L8 and capacitor C15, and the middle point between the 1st and 3rd series circuits is gorunded via capacitor 20; and then, inductances L6, L7 and L10 are connected in parallel to switching elements D2, D3 and D4, and switching element D5 is connected in series to capacitor 20. Switching elements D2 to D5 are all controlled by a switching control voltage from low band/high band switching control circuit 36, thereby making a changeover between low and high bands.
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公开(公告)号：JPS5487046A
公开(公告)日：1979-07-11
申请号：JP15490377
申请日：1977-12-22
Applicant: SONY CORP
Inventor： ISHIKAWA FUMIO
Abstract: PURPOSE:To vary both the central frequency and the trap frequency at once for the pass frequency band by adding the inductor and the capacitor to the band pass filter of the PI-type circuit comprising the capacitor, inductor and variable capacity diode. CONSTITUTION:Input terminal T1 is earthed via capacitor C1; terminal T1 is connected to one end of the serial circuit of inductor coil L1 and variable capacity element VC; and the other end of the serial circuit is earthed via inductor coil L2 as well as to the output terminal through inductor coil L3. And capacitor C2 is connected in parallel to the series circuit of coil L1, element VC and coil L3. When the band pass filter is applied to the high frequency inter-step tuning circuit of the UHF TV tuner, the image signal of the sum frequency of the double intermediate frequency and the frequency of the UHF TV signal is trapped.
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