公开(公告)号：JPH03273621A

公开(公告)日：1991-12-04

申请号：JP7394490

申请日：1990-03-23

Applicant: SONY CORP

Inventor： NOGUCHI TAKASHI ,  KANEISHI YOSHIKAZU

IPC: H01L27/11 ,  H01L21/268 ,  H01L21/8244

Abstract: PURPOSE:To manufacture a semiconductor memory having the large area with out using a large laser device by forming a plurality of first regions wherein memory cells are arranged and a second region wherein memory cells are not arranged in a memory cell array part, projecting laser light on each first region, and performing annealing. CONSTITUTION:For example, when a laminated CMOS-type SRAM of 4-M bits is manufactured, memories of every 2-M bits are arranged in each of first regions 14 and 15. The width of second region 16 is set at, e.g. 50mum or more. Polycrystalline Si thin films for forming thin film pMOS transistors are formed on the first regions 14 and 15. Excimer laser light is sequentially projected on each of the first and second regions 14 and 15, and the polycrystalline Si thin films are annealed. Thus the required treatments are performed, and the memory cell is completed. At this time, even if there is an error in position alignment of illuminated region as 11 and 12, a non-illuminated region 17 is formed in the second region 16 so that the illuminated regions are not over lapped. Wirings are formed in the second region of Al films and the like and brought into contact with the polycrystalline Si thin film within the first regions.

公开(公告)号：JPH03161966A

公开(公告)日：1991-07-11

申请号：JP30248789

申请日：1989-11-21

Applicant: SONY CORP

Inventor： NOGUCHI TAKASHI ,  SUMI HIROBUMI

IPC: H01L27/11 ,  H01L21/8244

Abstract: PURPOSE:To decrease the leak current of a transistor and reduce power consumption, by constituting a memory cell by using an FF constituted of a pair of inverters, and constituting a transistor as a double gate structure in a storage device in which a thin film transistor operates as the load element of an inverter. CONSTITUTION:A memory cell is constituted of an FF 11 and a pair of a transferring transistors 12, 13. The FF 11 is constituted by cross-coupling the input and the output of a pair of inverters 14, 15. The driving transistor 16, 17 of the inverters 14, 15 are NMOS transistors, and load transistor 21, 22 are PMOS transistors. The transistors 21, 22 have double gate structure. Leak current of the load transistors 21, 22 are mainly generated in a P i-junction in the vicinity of a drain region. When the transistors 21, 22 have the double gate structure in this manner, the voltage of the P i-junction in the vicinity of one drain region is lowered, and the leak current is reduced.

公开(公告)号：JPH0364041A

公开(公告)日：1991-03-19

申请号：JP19807689

申请日：1989-08-01

Applicant: SONY CORP

Inventor： NOGUCHI TAKASHI ,  SATO HIROSHI ,  NISHIYAMA KAZUO ,  KATO YASABURO

IPC: H01L21/762 ,  H01L21/205 ,  H01L21/76

Abstract: PURPOSE:To prevent occurrences of whiskers by performing ion implantation of silicon from the oxide film of silicon on a semiconductor substrate or from the upper side of polycrystal of silicon. CONSTITUTION:After performing mirror-polishing of a single crystal silicon substrate 1, grooves 2 having each prescribed size are formed on the surface of the above substrate by etching. Then, a silicon oxide film 3 is formed on its whole surface. Silicon ions 6 are injected from the surface of the silicon oxide film 3 by ion implantation. It is preferable for its injecting condition to inject the silicon ions amounting to a dose of 10 /cm or more at an accelerated voltage of nearly 20KeV and after that, annealing is performed at a temperature of the order of 700-900 deg.C. As the occurrences of whiskers on polycrystal silicon are suppressed, the bend of the whiskers caused by polishing which is performed prior to pasting of a base and removal of a part of a polycrystal silicon film are prevented. Then, occurrences of air bubbles and bursts are prevented by a thermal treatment process and the like which are performed after pasting the base.

公开(公告)号：JPH02280320A

公开(公告)日：1990-11-16

申请号：JP10208689

申请日：1989-04-21

Applicant: SONY CORP

Inventor： OSADA TOMOYUKI ,  NOGUCHI TAKASHI

IPC: H01L21/26 ,  H01L21/265

Abstract: PURPOSE:To reduce development of a leak current and to prevent deterioration of service life by changing a wavelength of irradiation light from a short wavelength to a long wavelength and by carrying out light annealing after ion implantation. CONSTITUTION:A buried layer 2 is formed to a specified region of a semiconductor substrate 1 by ion implantation. Then, a wavelength of irradiation light is changed from a short wavelength to a long wavelength. Thereby, crystal recovery is carried out from a main surface 1a of the substrate 1, the buried layer 2 begins solid growth using a perfect crystal section of a surface layer 1A which exists over the buried layer 2, as a seed, and the solid growth moves from upper the buried layer 2 to below, resulting in solid growth in one direction against the buried layer 2. As a result, perfect recovery of crystallinity without crystal defects is realized to the buried layer 2, and remaining distortion is prevented from developing over the buried layer 2. According to this constitution, it is possible to realize perfect crystallinity recovery of an N-type well 12, etc., which is formed thereafter, to reduce a leak correct produced in the N-type well 12, etc., and to prevent deterioration of service life.

公开(公告)号：JPH02278819A

公开(公告)日：1990-11-15

申请号：JP10129789

申请日：1989-04-20

Applicant: SONY CORP

Inventor： NOGUCHI TAKASHI ,  OSADA TOMOYUKI

IPC: H01L21/265

Abstract: PURPOSE:To reduce a lattice defect produced in a region between an ion implantation layer and the surface of a substrate even when the ion implantation layer is formed in a deep region of the substrate by a method wherein, while a temperature gradient is being generated in the substrate, ions are implanted into the substrate along a direction from the low-temperature side toward the high-temperature side. CONSTITUTION:An Si wafer 11 as a whole is fixed at a temperature (77 K) of liquid nitrogen or a temperature lower than that; the rear 11a of the Si wafer 11 is irradiated with ultraviolet rays 12 in a pulse manner. Since Si has a large absorption coefficient of the ultraviolet rays 12, the ultraviolet rays 12 are absorbed near the rear 11a; the Si wafer 11 is heated only near the rear 11a; a temperature gradient is generated between the rear and the surface 11b. In a state of a large temperature gradient, ions 13 are implanted into the Si wafer 11 from the side of the surface 11b of the wafer 11 in synchronization with a pulse width of the ultraviolet rays 12. Thereby, a channeling phenomenon is easy to cause in a shallow region and is hard to cause in a deep region of the substrate. Accordingly, even when an ion implantation layer is formed in the deep region of the substrate, a lattice defect produced in a region between the ion implantation layer and the surface of the substrate is reduced.

公开(公告)号：JPH02237026A

公开(公告)日：1990-09-19

申请号：JP5757189

申请日：1989-03-09

Applicant: SONY CORP

Inventor： SUMI HIROBUMI ,  NOGUCHI TAKASHI

IPC: H01L21/3205 ,  H01L21/28 ,  H01L21/336 ,  H01L23/52 ,  H01L29/78

Abstract: PURPOSE:To reduce junction leakage current, contact resistance and sheet resistance by a method wherein a high melting point metallic silicide film is irradiated with specific laser beams in an atmosphere containing N to form a high melting point nitride film. CONSTITUTION:The surface of an interlayer insulating film 10 excluding the parts of contact holes C1 to C3 is covered with a reflection film 11 and then the whole surface is irradiated with laser beams B in an atmosphere containing N so that only TiSi2 films 9a to 9c inside these contact holes C1 to C3 may be locally heated at high temperature. Accordingly, TiN films 13a to 13c can be formed in self-alignment with these contact holes C1 to C3 on the TiSi2 films 9a to 9c. In this case, the parts not irradiated with the laser beams B are not heated at high temperature so that the surface of the TiSi2 films 9a to 9c on the parts not nitrified may not be subjected to the deterioration in morphology even if any hillock is formed on the surface. Through these procedures, contact resistance, sheet resistance and leakage current can be kept small.

公开(公告)号：JPH02174237A

公开(公告)日：1990-07-05

申请号：JP33045988

申请日：1988-12-27

Applicant: SONY CORP

Inventor： TAJIMA KAZUHIRO ,  BABA MIYUKI ,  NOGUCHI TAKASHI

IPC: H01L21/768 ,  H01L21/265 ,  H01L21/336 ,  H01L29/78 ,  H01L29/786

Abstract: PURPOSE:To form a low-resistance p type polycrystal silicon film by ion- implanting boron into a polycrystal silicon film or forming the polycrystal silicon film doped with boron, ion-implanting an inactive element into the polycrystal silicon film, performing heat-treatment at low temperature, and then performing heat-treatment at high temperature. CONSTITUTION:A gate insulation film 3 and a gate electrode 4 are formed at a polycrystal Si film 2 on a crystal substrate 1. Then, B is ion-implanted on the entire surface and a p type source region 5 and a drain region 6 are formed self-aligned manner for this gate electrode 4 within the polycrystal Si film 2. Then, for example Si is ion-implanted on the entire surface. By ion- implanting this Si, the polycrystal Si film constituting the gate electrode 4, the source region 5, and the drain region 6 can become nearly amorphous. Then, it is annealed at a low temperature of approximately 600 deg.C for example within N2 environment and is crystallized by allowing the amorphous Si film to be subjected to solid-phase growth for forming a polycrystal Si film. Then, by performing annealing at high temperature, electrical active and residual crystal defects of B within the polycrystal Si film constituting the gate electrode 4, the source region 5, and the drain region 6 can be eliminated.

公开(公告)号：JPH02122631A

公开(公告)日：1990-05-10

申请号：JP27664888

申请日：1988-11-01

Applicant: SONY CORP

Inventor： NOGUCHI TAKASHI

IPC: H01L21/20 ,  H01L21/316 ,  H01L21/336 ,  H01L29/78 ,  H01L29/786

Abstract: PURPOSE:To prevent abnormal oxidation due to fine crystal defects existing in a polycrystal semiconductor thin film from occurring by a method wherein a polycrystalline semiconductor thin film is heat-treated in inactive gas atmosphere and then a gate oxide film is formed on the polycrystalline semiconductor thin film by thermally oxidizing the polycrystalline semiconductor thin film. CONSTITUTION:A gate oxide film 5 is formed by performing thermal oxidation after removing film crystal defects in a polycrystalline Si thin film 4 by annealing in inactive gas atmosphere. This prevents abnormal oxidation from occurring at these crystal defects. Thus an interface between the polycrystalline Si thin film 4 and the gate oxide film 5 can be flattened, thereby realizing remarkable improvement such as improvement of resistant pressure of the gate oxide film 5, reduction in threshold voltage, reduction in gate voltage swing, etc., in addition to high speed switching capability of very thin polycrystalline Si TFT.

公开(公告)号：JPH02114559A

公开(公告)日：1990-04-26

申请号：JP26746088

申请日：1988-10-24

Applicant: SONY CORP

Inventor： NOGUCHI TAKASHI ,  NISHIHARA TOSHIYUKI ,  NISHIYAMA KAZUO

IPC: H01L27/04 ,  H01L21/822 ,  H01L21/8244 ,  H01L27/11

Abstract: PURPOSE:To execute a heat treatment used to stabilize a polycrystalline silicon film without causing a temperature rise at a surface part of a semiconductor substrate by a method wherein the polycrystalline silicon film is irradiated with a pulsed laser beam and is heated. CONSTITUTION:A polycrystalline silicon film 9 is irradiated with a pulsed laser beam by an excimer laser (XeCI); it is activated. Since the polycrystalline silicon film 9 has an absorption coefficient of nearly 100% with reference to ultraviolet rays and has a film thickness of about 50 to 800Angstrom , the pulsed laser beam radiated from the laser is absorbed completely by the polycrystalline silicon film 9. Accordingly, the lesser beam does not reach the substratum side of the polycrystalline silicon film 9; a semiconductor substrate is hardly heated. Thereby, the polycrystalline silicon film can be heated effectively without causing a temperature rise of the semiconductor substrate; a film quality to realize a high resistance and to stabilize a resistance can be controlled.

公开(公告)号：JPH02114521A

公开(公告)日：1990-04-26

申请号：JP26745888

申请日：1988-10-24

Applicant: SONY CORP

Inventor： NOGUCHI TAKASHI ,  GOMI TAKAYUKI

IPC: H01L29/73 ,  H01L21/26 ,  H01L21/268 ,  H01L21/331 ,  H01L29/40 ,  H01L29/417 ,  H01L29/732

Abstract: PURPOSE:To activate the polycrystalline silicon forming an emitter without affecting a base by subjecting the polycrystalline silicon forming the emitter to a heating treatment using a short wavelength arc lamp or an excimer laser. CONSTITUTION:A polycrystalline silicon film 10 is formed by LP-CVD, and the polycrystalline silicon film 10 is brought into an amorphous state by means of impurity ion implantation. Then, high temperature and short time annealing is carried out by a short wavelength arc lamp or an excimer laser to activate the polycrystalline silicon film 10. Herein, the light beam emitted by the short wavelength arc lamp or the excimer laser consists of light having a short wavelength effectively absorbed by the silicon, so that only the polycrystalline silicon 10 is effectively heated. Thus, the polycrystalline silicon 10 forming an emitter can be activated without affecting bases 7, 8.