High-Voltage Normally-Off Field Effect Transistor
    61.
    发明申请
    High-Voltage Normally-Off Field Effect Transistor 有权
    高电压常关场效应晶体管

    公开(公告)号:US20130069114A1

    公开(公告)日:2013-03-21

    申请号:US13622379

    申请日:2012-09-19

    Abstract: A device having a channel with multiple voltage thresholds is provided. The channel can include a first section located adjacent to a source electrode, which is a normally-off channel and a second section located between the first section and a drain electrode, which is a normally-on channel. The device can include a charge-controlling electrode connected to the source electrode, which extends from the source electrode over at least a portion of the second section of the channel. During operation of the device, a potential difference between the charge-controlling electrode and the channel can control the on/off state of the normally-on section of the channel.

    Abstract translation: 提供具有多个电压阈值的通道的装置。 通道可以包括位于与作为常开通道的源电极相邻的第一部分和位于第一部分和作为常开通道的漏电极之间的第二部分。 该装置可以包括连接到源电极的电荷控制电极,其从源电极延伸到通道的第二部分的至少一部分上。 在器件工作期间,充电控制电极和通道之间的电位差可以控制通道的常开部分的开/关状态。

    Opto-electronic device with two-dimensional injection layers

    公开(公告)号:US10586890B2

    公开(公告)日:2020-03-10

    申请号:US16143015

    申请日:2018-09-26

    Abstract: An opto-electronic device with two-dimensional injection layers is described. The device can include a semiconductor structure with a semiconductor layer having one of an n-type semiconductor layer or a p-type semiconductor layer, and a light generating structure formed on the semiconductor layer. A set of tilted semiconductor heterostructures is formed over the semiconductor structure. Each tilted semiconductor heterostructure includes a core region, a set of shell regions adjoining a sidewall of the core region, and a pair of two-dimensional carrier accumulation (2DCA) layers. Each 2DCA layer is formed at a heterointerface between one of the sidewalls of the core region and one of the shell regions. The sidewalls of the core region, the shell regions, and the 2DCA layers each having a sloping surface, wherein each 2DCA layer forms an angle with a surface of the semiconductor structure.

    Integrated ultraviolet analyzer
    65.
    发明授权

    公开(公告)号:US10190973B2

    公开(公告)日:2019-01-29

    申请号:US15472198

    申请日:2017-03-28

    Abstract: An integrated ultraviolet analyzer is described. The integrated ultraviolet analyzer can include one or more ultraviolet analyzer cells, each of which includes one or more ultraviolet photodetectors and one or more solid state light sources, which are monolithically integrated. The solid state light source can be operated to emit ultraviolet light, at least some of which passes through an analyzer active gap and irradiates a light sensing surface of the ultraviolet photodetector. A medium to be evaluated can be present in the analyzer active gap and affect the ultraviolet light as it passes there through, thereby altering an effect of the ultraviolet light on a ultraviolet photodetector.

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