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61.发明公开
公开(公告)号：EP2010351A2
公开(公告)日：2009-01-07
申请号：EP07724433.3
申请日：2007-04-20
Inventor： QUENZER, Hans-Joachim , ZWICKER, Gerfried
CPC classification number: B23H3/00 , B81C1/00634 , B81C2201/0146 , C25F3/14
Abstract: The invention relates to a method for treating the surfaces of an electrically conducting substrate surface (2). According to said method, a tool (1) comprising an ion-conducting solid material is contacted with the substrate surface at least in some areas thereof, said tool being adapted to conduct the metal ions of the substrate surface and an electric potential (U) being applied thereto so that an electric potential gradient is applied between the substrate surface and the tool in such a manner that the tool removes metal ions from the substrate surface or deposits them onto the substrate surface.
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公开(公告)号：EP1167280A2
公开(公告)日：2002-01-02
申请号：EP01305430.9
申请日：2001-06-22
Applicant: Randox Laboratories Ltd.
Inventor： Gamble, Harold S , Mitchell, S J Neil , Prochaska, Andrzej , Fitzgerald, Stephen Peter, c/o Randox Labs. Ltd.
CPC classification number: B81C1/00158 , B41J2/16 , B41J2/1623 , B41J2/1628 , B41J2/1632 , B41J2/1639 , B81B2203/0315 , B81C2201/0115 , B81C2201/0146
Abstract: A method of manufacturing a diaphragm utilising a precision grinding technique after etching a cavity in a wafer. A technique for preventing distortion of the diaphragm based on use of a sacrificial layer of porous silicon is disclosed.
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公开(公告)号：EP3095757A1
公开(公告)日：2016-11-23
申请号：EP16169401.3
申请日：2016-05-12
Applicant: ams International AG
Inventor： Daamen, Roel , Bouman, Hendrik , Vijayakumar, Kailash
CPC classification number: B81C1/00825 , B81B7/0016 , B81B2201/0264 , B81B2203/0127 , B81B2207/015 , B81B2207/03 , B81C2201/0104 , B81C2201/0146 , B81C2203/0735 , H01L23/642
Abstract: One example discloses a chip, comprising: a substrate (102, 202, 302, 602, 802); a first side of a passivation layer (206, 604, 804) coupled to the substrate (102, 202, 302, 602, 802); a device, having a device height and a cavity, wherein a first device surface is coupled to a second side of the passivation layer (206, 604, 804) which is opposite to the first side of the passivation layer (206, 604, 804); and a set of structures (108, 110, 214, 306, 410, 502, 504, 612, 614, 702, 812) coupled to the second side of the passivation layer (206, 604, 804) and configured to have a structure height greater than or equal to the device height.
Abstract translation: 一个例子公开了一种芯片，包括：衬底（102,202,302,602,802）; 耦合到所述衬底（102,202,302,602,802）的钝化层（206,604,804）的第一侧; 具有器件高度和空腔的器件，其中第一器件表面耦合到钝化层（206,604,804）的与钝化层（206,604,804）的第一侧相对的第二侧 ）; 以及耦合到钝化层（206,604,804）的第二侧的一组结构（108,110,214,306,410,502,504,612,614,702,812），并且被配置为具有结构 高度大于或等于设备高度。
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64.发明授权Verfahren zur Oberflächenbehandlung einer elektrisch leitfähigen Substratoberfläche 有权一种用于在导电基底表面的表面处理方法
公开(公告)号：EP2058075B1
公开(公告)日：2014-06-18
申请号：EP08022415.7
申请日：2007-04-20
Inventor： Quenzer, Hans-Joachim , Zwicker, Gerfried
CPC classification number: B23H3/00 , B81C1/00634 , B81C2201/0146 , C25F3/14
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65.发明授权
公开(公告)号：EP2010351B1
公开(公告)日：2012-06-27
申请号：EP07724433.3
申请日：2007-04-20
Inventor： QUENZER, Hans-Joachim , ZWICKER, Gerfried
CPC classification number: B23H3/00 , B81C1/00634 , B81C2201/0146 , C25F3/14
Abstract: The invention relates to a method for treating the surfaces of an electrically conducting substrate surface (2). According to said method, a tool (1) comprising an ion-conducting solid material is contacted with the substrate surface at least in some areas thereof, said tool being adapted to conduct the metal ions of the substrate surface and an electric potential (U) being applied thereto so that an electric potential gradient is applied between the substrate surface and the tool in such a manner that the tool removes metal ions from the substrate surface or deposits them onto the substrate surface.
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Patent Agency Ranking66.发明公开Verfahren zur Oberflächenbehandlung einer elektrisch leitfähigen Substratoberfläche 有权一种用于在对制成的玻璃透镜成型玻璃碳的按压工具的制造中的表面处理工艺。
公开(公告)号：EP2058076A2
公开(公告)日：2009-05-13
申请号：EP08022416.5
申请日：2007-04-20
Inventor： Quenzer, Hans-Joachim , Zwicker, Gerfried
CPC classification number: B23H3/00 , B81C1/00634 , B81C2201/0146 , C25F3/14
Abstract: Beschrieben wird ein Verfahren zur Oberflächenbehandlung einer elektrisch leitenden Substratoberfläche, bei dem ein festes Ionen leitendes Material in Form von ZrO 2 aufweisendes Werkzeug wenigstens bereichsweise in Kontakt mit der Substratoberfläche, die Kohlenstoff wie etwa Graphit und/oder Glaskohlenstoff enthält, gebracht wird, das als anionischer Ionenleiter ausgebildet ist und an das ein elektrisches Potenzial angelegt wird, so dass aus dem anionischen Ionenleiter Anionen austreten, die sich an der Substratoberfläche zu einer mit der Substratoberfläche reaktiven Verbindung umwandeln, und dass die reaktionsfähige Verbindung mit dem Graphit oder Glaskohlenstoff an der Substratoberfläche eine gasförmige Verbindung eingeht, wodurch die Substratoberfläche lokal abgetragen wird.
Abstract translation: 为导电基材表面的表面处理方法包括使由固体材料传导离子在基板表面传导金属离子和施加到电势在基板表面和工具之间的电势降也是如此制成的工具中产生 ， 所述金属离子从表面基材使用工具移除或沉积在基板表面上。
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公开(公告)号：EP1167280A3
公开(公告)日：2002-03-27
申请号：EP01305430.9
申请日：2001-06-22
Applicant: Randox Laboratories Ltd.
Inventor： Gamble, Harold S , Mitchell, S J Neil , Prochaska, Andrzej , Fitzgerald, Stephen Peter, c/o Randox Labs. Ltd.
CPC classification number: B81C1/00158 , B41J2/16 , B41J2/1623 , B41J2/1628 , B41J2/1632 , B41J2/1639 , B81B2203/0315 , B81C2201/0115 , B81C2201/0146
Abstract: A method of manufacturing a diaphragm utilising a precision grinding technique after etching a cavity in a wafer. A technique for preventing distortion of the diaphragm based on use of a sacrificial layer of porous silicon is disclosed.
Abstract translation: 在蚀刻晶片中的空腔之后利用精密研磨技术制造隔膜的方法。 公开了基于使用多孔硅的牺牲层来防止隔膜变形的技术。
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公开(公告)号：JP5513509B2
公开(公告)日：2014-06-04
申请号：JP2011527291
申请日：2009-09-09
Applicant: ウニヴェルシテ リヨン アン クロード ベルナール , サントル ナシオナル ドゥ ラ ルシェルシェ シアンティフィクCentre National De La Recherche Scientifique , エコル サントラル ドゥ リヨン
Inventor： カブレラ ミシェル
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公开(公告)号：JP2013040406A
公开(公告)日：2013-02-28
申请号：JP2012200153
申请日：2012-09-12
Applicant: Fraunhofer Ges Zur Foerderung Der Angewandten Forschung Ev , フラウンホファー ゲセルシャフト ツール フェールデルンク ダー アンゲヴァンテン フォルシュンク エー.ファオ.
Inventor： QUENZER HANS-JOACHIM , ZWICKER GERFRIED
CPC classification number: B23H3/00 , B81C1/00634 , B81C2201/0146 , C25F3/14
Abstract: PROBLEM TO BE SOLVED: To provide the levelling method of a wafer covered with metal.SOLUTION: A tool 1 having a solid ion-conducting material is, at least partially, brought into contact with a base body surface 2 formed as a silicon wafer surface, the tool is formed as anionic conductive body, and a potential is applied to the tool, thereby, anions are discharged from the anionic conductive body, the anions are changed into a compound which reacts with the surface of silicon wafer on the surface of silicon wafer, the compound which can react with silicon isolates a gaseous compound on the surface of silicon wafer and, thereby, the surface of silicon wafer is locally removed.
Abstract translation: 要解决的问题：提供用金属覆盖的晶片的调平方法。 解决方案：具有固体离子传导材料的工具1至少部分地与形成为硅晶片表面的基体表面2接触，该工具形成为阴离子导电体，并且电位为 因此阴离子从阴离子导电体排出，阴离子变成与硅晶片表面上的硅晶片表面发生反应的化合物，可与硅反应的化合物将气体化合物分离出来 硅晶片的表面，从而局部去除硅晶片的表面。 版权所有（C）2013，JPO＆INPIT
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公开(公告)号：JP2013032593A
公开(公告)日：2013-02-14
申请号：JP2012200152
申请日：2012-09-12
Applicant: Fraunhofer Ges Zur Foerderung Der Angewandten Forschung Ev , フラウンホファー ゲセルシャフト ツール フェールデルンク ダー アンゲヴァンテン フォルシュンク エー.ファオ.
Inventor： QUENZER HANS-JOACHIM , ZWICKER GERFRIED
CPC classification number: B23H3/00 , B81C1/00634 , B81C2201/0146 , C25F3/14
Abstract: PROBLEM TO BE SOLVED: To provide a method for giving a microstructure or nanostructure to the inside of the surface of a conductive substrate.SOLUTION: The method is used to treat the surface 2 of a conductive substrate. A tool 1 having solid ion conductive material is at least partly in contact with the surface 2 thereof, and it can conduct metal ion of the surface 2 and a potential gradient is generated between the surface 2 and the tool 1. Potential U is applied to the tool 1 so that the metal ion may be separated from the surface 2 through the tool 1 or be precipitated on the surface 2.
Abstract translation: 要解决的问题：提供一种向导电性基材的表面的内部赋予显微结构或纳米结构的方法。
解决方案：该方法用于处理导电基板的表面2。 具有固体离子导电材料的工具1至少部分地与其表面2接触，并且其可以导电表面2的金属离子，并且在表面2和工具1之间产生电位梯度。将电位U施加到 工具1，使得金属离子可以通过工具1与表面2分离或沉淀在表面2上。（C）2013，JPO＆INPIT
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