Abstract:
A frequency conversion device for transforming a frequency of an input signal, the device comprising: a signal generator for providing a plurality N of first signals at a first frequency, where N≧1, from an input signal having an in-phase component I and a quadrature signal component Q; an oscillator for generating N parallel oscillation signals, wherein the N oscillation signals are stepped in phase with respect to one another; a mixer comprising N mixing components, each mixing component being coupled to receive a respective one of the plurality of first signals and coupled to receive a respective oscillation signal for mixing the respective first signal with the corresponding oscillation signal to provide an output signal; and a common amplifier for receiving the N output signals from the N mixing components in N sequential phases for transmission.
Abstract:
A receiver receives a desired radio sub-channel transmitted with an unwanted radio sub-channel by producing signal branches from a received radio signal by treating orthogonal components of the received signal separately and also by using one or both of oversampling and multiple receive antennas. Channel estimates for both the desired and unwanted radio sub-channels are produced for signal branches. The unwanted radio sub-channel bits are estimated from a non-stacked form of the received radio signal. The channel estimates and the estimate of the unwanted radio sub-channel bits are used to reconstruct unwanted radio sub-channel components separately for signal branches. Desired radio sub-channel signal branches are produced by subtracting a corresponding one of the reconstructed unwanted radio sub-channel components from signal branches. A non-stacked desired signal is produced by combining the desired radio sub-channel signal branches. The non-stacked desired signal is processed to receive the desired radio sub-channel.
Abstract:
An RF front end circuit has a common impedance matching network connected to an output terminal, a first power amplifier arranged to drive power to the output terminal through the common impedance matching network, a second power amplifier adapted to drive power to the output terminal through the common impedance matching network, a second impedance matching network, and a reference terminal at a reference voltage. The second impedance matching network has at least a first connection path to the reference terminal, a second connection path to the second power amplifier and a third connection path to the common impedance matching network. The second impedance matching network also includes a first impedance switch configured to open the first connection path responsive to the second power amplifier being put into an OFF state.
Abstract:
A method is provided for managing public and private data input by a device such as a mobile handset, a personal digital assistant, a personal computer and an electronic tablet. Method provides for separating public and private data such that public data can be operated on by open operating system and private data is either encrypted while in the open operating environment but can be operated on and used when received by the secure operating environment.
Abstract:
Methods and systems for performing interference mitigation (immunity management) in a radio communication device. A list of frequencies is provided from at least one radio subsystem to an immunity management (IMM) module. The IMM module determines whether any of the frequencies in the list represent a conflict with harmonics associated with one or more clock frequencies associated with one or more embedded systems. If a conflict exists, then the IMM module makes a change in the fundamental frequency of the corresponding clock to remove the conflict, while also ensuring that other frequencies in the list are not impacted by the change. The potential need to change clock frequencies can be evaluated at state transitions of the device, e.g., call establishment, call release, handover or channel re-allocation events.
Abstract:
Methods and apparatuses drive a Single Inductor Bipolar Output Buck-Boost configured to provide both positive output voltage and a negative output voltage. The power stage is driven so that an amount of energy to be accumulated during a charging phase is controlled via the duty cycle of a first control signal, and an amount of energy to be discharged during an independent discharging phase in a buck-type or boost-type is controlled via the duty cycle of a second control signal.
Abstract:
The present invention provides a method for analyzing a digital image comprising a plurality of pixels representing a scene. The method comprising steps of obtaining pixel chromaticity information, providing, combinations each having a corresponding surface and a corresponding illuminant, performing a global scene surface-illuminant classification by determining hypothesis scores, accumulating hypothesis scores, thereby obtaining a global illuminant/surface statistic representing an estimate of a distribution of illuminants and/or surfaces in the scene as represented by the digital image. Other methods are also provided. Apparatuses for carrying out the methods are also provided.
Abstract:
In an embedded system, there are a plurality of data requesting devices, a plurality of data sources and a bus fabric interconnecting the data requesting devices and the data sources, wherein the bus fabric comprises a plurality of bus components. Some or all of the data sources and arbitration devices associated with the bus components resolve contentions between data bursts by selecting a first one of the contending data bursts; determining a length of a critical section of the first selected data burst; and processing the critical section of the selected data burst. Then, a second one of the contending data bursts is selected, a length of a critical section of the second selected data burst is determined, and the critical section of the second selected data burst is processed before a non-critical section of the selected data burst.
Abstract:
The present invention concerns a low dropout (LDO) regulator of regulating an output signal, the LDO regulator comprising an input stage (15) and an output stage (17), the input stage being adapted to receive a reference signal (VREF) and a feed-back signal (VF) depending on an output signal (VOUT), and to output an intermediate signal based on the feedback signal and on the reference signal, wherein the LDO regulator further comprises a gain stage (16) having a given gain value, which is configurable and wherein the output signal is regulated based on the gain value of the gain stage and on the intermediate signal.
Abstract:
A method in a signal generating unit, SGU, generates a signal to be used in a Near-Field Communication, NFC, reader. The SGU is configured to communicate with an NFC controller unit, NFC-CU, and with an NFC-Wired Interface unit, NFC-WIU. The NFC-CU and the SGU are included in an NFC device, and the NFC-WIU is connected to the NFC device. The SGU receives a first signal that includes data encoding information indicating a first unique identifier supported by the NFC-CU, from the NFC-CU, and a second signal that includes data encoding information indicating a second unique identifier supported by the NFC-WIU, from the NFC-WIU. The SGU generates a third signal to be used in the NFC reader to generate a collision sequence, based on the first signal and the second signal. An SGU configured to perform the method, and a NFC device that includes the SGU are also provided.