71.
    发明专利
    未知

    公开(公告)号:DE60131993T2

    公开(公告)日:2008-12-11

    申请号:DE60131993

    申请日:2001-08-31

    Abstract: A statistical multiplexer for coding and multiplexing multiple channels of digital television data, or multiple panels of HDTV digital television data. A bit rate need parameter is determined for each encoder in a stat mux group, and an encoding bit rate is allocated to each channel based on its need parameter. A transmission bit rate is allocated to each channel as a time-lagged version of its need parameter to minimize a rate mismatch between the output and the input of a decoder buffer. A packet processor checks for impending decoder buffer overflow or underflow events to set minimum and maximum limits on the transmission bit rate. Moreover, these limits are set based on whether a new transmission bit rate can be implemented before the decoding time stamp (DTS) of the current or next frame.

    72.
    发明专利
    未知

    公开(公告)号:DE69726508D1

    公开(公告)日:2004-01-15

    申请号:DE69726508

    申请日:1997-08-04

    Abstract: Disparity estimation between the right and left view pixel luminance values in a stereoscopic video signal is optimized by determining the minimum least-square-error between macroblocks of the right and left view pictures. Affine transform coefficients and disparity vectors which correspond to the minimum error are also determined and transmitted in the data stream for use by a decoder in reconstructing the right view picture. The scheme can be implemented either locally, at the macroblock level, or globally, at the picture level. At the macroblock level, least-square-error optimization may occur for each individual macroblock in the right view picture. In this case, affine transform coefficients are provided for each macroblock. At the picture level, the sum of the least-square-errors is minimized after the blocks of the right view picture are matched to the left view picture. In this case, only one set of affine transform coefficients are required for the entire right view picture. Or, block matching between an affinely transformed left view picture and the right view picture may be performed after minimizing the sum of the least-square-errors. The scheme is particularly useful in minimizing the effects of cross-channel luminance imbalances due to camera variations and scenes with significant changes in brightness or contrast, and is compatible with stereoscopic video systems such as the MPEG Multi-view Profile (MVP) system.

    FRAME BIT-SIZE ALLOCATION FOR SEAMLESSLY SPLICED, VARIABLE-ENCODING-RATE, COMPRESSED DIGITAL VIDEO SIGNALS

    公开(公告)号:CA2796179A1

    公开(公告)日:2002-06-21

    申请号:CA2796179

    申请日:2001-12-18

    Abstract: A controller allocates a bit size for a current frame in a group of pictures of a first compression-encoded digital video signal that is to be spliced following transmission of the group of pictures with a second compression-encoded digital video signal. The signals are spliced after a predetermined switching time. The spliced signals are buffered by a decoder buffer and then decoded by a decoder. When the second signal has a variable bit-encoding rate and the current frame is not decoded until after the predetermined switching time, the maximum bit size is determined in accordance with an estimate of the decoder buffer fullness at the predetermined switching time. When the second signal has a predetermined maximum variable bit-encoding rate and the current frame is not decoded until after the predetermined switching time, the minimum bit size is determined in accordance with the predetermined maximum bit-encoding rate of the second signal.

    FRAME BIT-SIZE ALLOCATION FOR SEAMLESSLY SPLICED, VARIABLE-ENCODING-RATE, COMPRESSED DIGITAL VIDEO SIGNALS

    公开(公告)号:CA2365365A1

    公开(公告)日:2002-06-21

    申请号:CA2365365

    申请日:2001-12-18

    Abstract: A controller allocates a bit size for a current frame in a group of pictures of a first compression-encoded digital video signal that is to be spliced following transmission of the group of pictures with a second compression-encoded digital video signal . The signals are spliced after a predetermined switching time. The spliced signal s are buffered by a decoder buffer and then decoded by a decoder. When the second signal ha s a variable bit-encoding rate and the current frame is not decoded until after the predetermined switching time, the maximum bit size is determined in accordan ce with an estimate of the decoder buyer fullness at the predetermined switching time. When the second signal has a predetermined maximum variable bit-encoding rate and the current frame is not decoded until after the predetermined switching time, the minim um bit size is determined in accordance with the predetermined maximum bit-encoding rate of the second signal.

    Processing mode selection for channels in a video multi-processor system

    公开(公告)号:AU8505701A

    公开(公告)日:2002-04-02

    申请号:AU8505701

    申请日:2001-08-20

    Abstract: An efficient processing system, such as for transcoding video data. In an embodiment that is suitable for single or multiple processor embodiments, a processing mode is set for each input video frame, e.g., as a full transcode mode, which uses motion compensation, a requantization mode, which avoids motion compensation, or a bypass mode. The processing mode selection is based on a number of processing cycles that are available to process a frame, and an expected processing requirement of the frame. The bypass or requantization modes are selected to avoid a buffer overflow of the processor.

    OPTIMAL DISPARITY ESTIMATION FOR STEREOSCOPIC VIDEO CODING

    公开(公告)号:CA2212069C

    公开(公告)日:2001-06-12

    申请号:CA2212069

    申请日:1997-07-31

    Abstract: Disparity estimation between the right and left view pixel luminance values in a stereoscopic video signal is optimized by determining the minimum least-square-error between macroblocks of the right and left view pictures. Affine transform coefficients and disparity vectors which correspond to the minimum error are also determined and transmitted in the data stream for use by a decoder in reconstructing the right view picture. The scheme can be implemented either locally, at the macroblock level, or globally, at the picture level. At the macroblock level, least-square-error optimization may occur for each individual macroblock in the right view picture. In this case, affine transform coefficients are provided for each macroblock. At the picture level, the sum of the least-square-errors is minimized after the blocks of the right view picture are matched to the left view picture. In this case, only one set of affine transform coefficients are required for the entire right view picture. Or, block matching between an affinely transformed left view picture and the right view picture may be performed after minimizing the sum of the least-square-errors. The scheme is particularly useful in minimizing the effects of cross-channel luminance imbalances due to camera variations and scenes with significant changes in brightness or contrast, and is compatible with stereoscopic video systems such as the MPEG Multi-view Profile (MVP) system.

    79.
    发明专利
    未知

    公开(公告)号:DE69422654D1

    公开(公告)日:2000-02-24

    申请号:DE69422654

    申请日:1994-03-23

    Abstract: A variable length codeword packer (Fig. 3) communicates codeword data in successive m-bit bytes. A binary sum is accumulated (86) indicative of a total number of codeword bits received over time. A byte pointer (90) is derived from at least one most significant bit of the binary sum. A bit pointer (92) is derived from a plurality of least significant bits of the binary sum. A first data storage array (20) has a plurality of m-bit first storage bytes and is responsive to the byte pointer for storing received codeword data in the first storage bytes. A second data storage array (22) has a plurality of m-bit second storage bytes and is responsive to the byte and bit pointers for filling the second storage bytes with codeword data from the first data storage array (20). m-bit bytes of codeword data (25) are output from each filled second storage byte to provide successive m-bit bytes of codeword data. The use of a multistage approach in packing variable length codewords substantially reduces the complexity as compared to single stage designs.

    80.
    发明专利
    未知

    公开(公告)号:DE69131438T2

    公开(公告)日:2000-02-03

    申请号:DE69131438

    申请日:1991-05-18

    Abstract: A method and apparatus are provided for processing digital video signals for transmission in a compressed form. A set of pixel data is compressed without motion compensation to provide a first compressed video signal. The pixel data is compressed using motion compensation to provide a second compressed video signal. The data in the first and second compressed video signals is quantified. A comparison is made to determine which of the signals contains the least data. Successive sets of pixel data are sequentially compressed and quantified and the compressed video signal having the least data for each particular set is selected. The selected signals are encoded to identify them as motion compensated or non-motion compensated signals, and combined to provide a compressed video signal data stream for transmission. Apparatus for receiving and decoding the signals is also disclosed.

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