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公开(公告)号:US11524690B2
公开(公告)日:2022-12-13
申请号:US16783371
申请日:2020-02-06
Applicant: Micron Technology, Inc.
Inventor: Gil Golov
Abstract: The disclosed embodiments are directed to adjusting the operational characteristics of a black box installed in a vehicle. In one embodiment a method is disclosed comprising classifying a mental state of a driver of an automobile, loading at least one setting based on the mental state, the setting defining an operational characteristic of a black box installed in the automobile, configuring the black box using the at least one setting, and recording one or more events by the black box.
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公开(公告)号:US11507175B2
公开(公告)日:2022-11-22
申请号:US16179072
申请日:2018-11-02
Applicant: Micron Technology, Inc.
Inventor: Gil Golov
IPC: G06F1/32 , G06F3/06 , G06F1/3287 , G06F1/28
Abstract: A computing system has a first processing device (e.g., CPU, FPGA, or GPU) and memory regions (e.g., in a DRAM device) used by the processing device during normal operation. In one approach, the computing system is configured to: collect data associated with operation of an autonomous vehicle; monitor, by a first processing device, the collected data; and based on the monitoring, determine that an event on the autonomous vehicle has occurred. The computing system is further configured to, in response to determining that the event has occurred, initiate a transfer of data controlled by a second processing device, the transfer including copying data stored in volatile memory of the autonomous vehicle to non-volatile memory of the autonomous vehicle, wherein the second processing device controls copying of the data independently of the first processing device. The computing system is also further configured to, in response to determining that the event has occurred, reduce or terminate power to the first processing device.
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公开(公告)号:US11487436B2
公开(公告)日:2022-11-01
申请号:US16995083
申请日:2020-08-17
Applicant: Micron Technology, Inc.
Inventor: Jeffrey S. McNeil, Jr. , Niccolo' Righetti , Kishore K. Muchherla , Akira Goda , Todd A. Marquart , Mark A. Helm , Gil Golov , Jeremy Binfet , Carmine Miccoli , Giuseppina Puzzilli
Abstract: Instructions can be executed to determine a quantity of logical units that are part of a memory device. The instructions can be executed to operate the logical units with a programming time sufficient to provide a required throughput for storage of time based telemetric sensor data received from a host. The instructions can be executed to operate the logical units with a trim that correspond to the programming time.
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公开(公告)号:US20220317918A1
公开(公告)日:2022-10-06
申请号:US17219327
申请日:2021-03-31
Applicant: Micron Technology, Inc.
Inventor: Gil Golov
IPC: G06F3/06
Abstract: A system including sensors of an advanced driver assistance system and a data recorder. The data recorder has: a volatile memory; a non-volatile memory configured with a file system region and a buffer region; and a processor configured to implement a file system mounted in the file system region. The data recorder records outputs from the sensors via the volatile memory into the buffer region in a cyclic way and, in response to an event, retrieve sensor data from the buffer region and store the sensor data into files organized under the file system mounted in the file system region.
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公开(公告)号:US11437111B2
公开(公告)日:2022-09-06
申请号:US17122758
申请日:2020-12-15
Applicant: Micron Technology, Inc.
Inventor: Jeffrey S. McNeil, Jr. , Karl D. Schuh , Vamsi Pavan Rayaprolu , Giuseppina Puzzilli , Kishore K. Muchherla , Gil Golov , Todd A. Marquart , Jiangang Wu , Niccolo' Righetti , Ashutosh Malshe
Abstract: Instructions can be executed to adjust a trim at first intervals until a quantity of program/erase cycles (PEC) have occurred. The trim defines a valley width between data states. Instructions can be executed to adjust the trim at second intervals, greater than the first intervals, after the quantity of PEC have occurred.
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公开(公告)号:US20220122642A1
公开(公告)日:2022-04-21
申请号:US17562620
申请日:2021-12-27
Applicant: Micron Technology, Inc.
Inventor: Gil Golov
Abstract: Systems, methods, and apparatus related to validating data stored in a memory system. In one approach, a DRAM stores data for a host device. A controller that manages the DRAM receives a command from the host device to generate a signature. The controller also receives data from the host device that indicates a region of the DRAM. In response to receiving the command, the controller reads data from the indicated region. A signature is generated by the controller based on the data read from the indicated region. The generated signature is sent to the host device in response to the command.
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公开(公告)号:US11309052B2
公开(公告)日:2022-04-19
申请号:US17001723
申请日:2020-08-25
Applicant: Micron Technology, Inc.
Inventor: Kishore K. Muchherla , Niccolo' Righetti , Jeffrey S. McNeil, Jr. , Akira Goda , Todd A. Marquart , Mark A. Helm , Gil Golov , Jeremy Binfet , Carmine Miccoli , Giuseppina Puzzilli
Abstract: A system includes a memory device having a plurality of groups of memory cells and a processing device communicatively coupled to the memory device. The processing device is be configured to read a first group of memory cells of the plurality to determine a calibrated read voltage associated with the group of memory cells. The processing device is further configured to determine, using the calibrated read voltage associated with the first group of memory cells, a bit error rate (BER) of a second group of memory cells of the plurality. Prior to causing the memory device to perform a copyback operation on the plurality of groups of memory cells, the processing device is further configured to determine whether to perform a subsequent read voltage calibration on at least the second group of the plurality based, at least partially, on a comparison between the determined BER and a threshold BER.
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公开(公告)号:US20220068426A1
公开(公告)日:2022-03-03
申请号:US17001723
申请日:2020-08-25
Applicant: Micron Technology, Inc.
Inventor: Kishore K. Muchherla , Niccolo' Righetti , Jeffrey S. McNeil, JR. , Akira Goda , Todd A. Marquart , Mark A. Helm , Gil Golov , Jeremy Binfet , Carmine Miccoli , Giuseppina Puzzilli
Abstract: A system includes a memory device having a plurality of groups of memory cells and a processing device communicatively coupled to the memory device. The processing device is be configured to read a first group of memory cells of the plurality to determine a calibrated read voltage associated with the group of memory cells. The processing device is further configured to determine, using the calibrated read voltage associated with the first group of memory cells, a bit error rate (BER) of a second group of memory cells of the plurality. Prior to causing the memory device to perform a copyback operation on the plurality of groups of memory cells, the processing device is further configured to determine whether to perform a subsequent read voltage calibration on at least the second group of the plurality based, at least partially, on a comparison between the determined BER and a threshold BER.
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公开(公告)号:US20220066642A1
公开(公告)日:2022-03-03
申请号:US17006978
申请日:2020-08-31
Applicant: Micron Technology, Inc.
Inventor: Kishore K. Muchherla , Niccolo' Righetti , Jeffrey S. McNeil Jr. , Akira Goda , Todd A. Marquart , Mark A. Helm , Gil Golov , Jeremy Binfet , Carmine Miccoli , Giuseppina Puzzilli
IPC: G06F3/06
Abstract: A method includes performing a copyback operation comprising transferring, using an internal processing device, user data and header data corresponding to the user data from a first block of memory in a memory device to a register in the memory device, decoupling the user data from the header data, performing an error correction code (ECC) operation on updated header data using an external processing device, transferring, via the external processing device, the updated header data to the register, and transferring the user data and the updated header data from the register to a second block of memory in the memory device.
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公开(公告)号:US11250891B1
公开(公告)日:2022-02-15
申请号:US16991870
申请日:2020-08-12
Applicant: Micron Technology, Inc.
Inventor: Gil Golov
Abstract: Systems, methods, and apparatus related to validating data stored in a memory system. In one approach, a DRAM stores data for a host device. A controller that manages the DRAM receives a command from the host device to generate a signature. The controller also receives data from the host device that indicates a region of the DRAM. In response to receiving the command, the controller reads data from the indicated region. A signature is generated by the controller based on the data read from the indicated region. The generated signature is sent to the host device in response to the command.
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