公开(公告)号：JP2003066871A

公开(公告)日：2003-03-05

申请号：JP2001258427

申请日：2001-08-28

Applicant: Sony Corp ,  ソニー株式会社

Inventor： KAWASHIMA TOSHITAKA

IPC: H05B33/10 ,  G09F9/30 ,  G09G3/20 ,  G09G3/30 ,  H01L27/32 ,  H01L29/786 ,  H01L51/50 ,  H05B33/14 ,  H05B33/26

Abstract: PROBLEM TO BE SOLVED: To actualize high contrast and high definition without depending upon the performance of an organic EL element also in a simple matrix driving system. SOLUTION: A device has a substrate 10, 1st wires 1 formed on one main surface of the substrate 10, 2nd wires 3 formed across the 1st wires 1, and pixels 5 arranged corresponding to the intersections of the 1st wires 1 and 2nd wires 3. Each pixel 5 has a switching element 8 which turns on when the 1st wire is selected to allow a signal current supplied from the 2nd wire 3 flow and an organic EL element 9 which emits light by receiving the signal current from the switching element 8.

Abstract translation: 要解决的问题：为了实现高对比度和高清晰度，而不依赖于简单矩阵驱动系统中的有机EL元件的性能。 解决方案：器件具有基板10，形成在基板10的一个主表面上的第一布线1，跨越第一布线1形成的第二布线3和与第一布线1和第二布线3相交的布置的像素5。 每个像素5具有开关元件8，当选择第一导线以允许从第二线3流动提供的信号电流时接通，以及通过从开关元件8接收信号电流而发光的有机EL元件9。

公开(公告)号：JP2003059658A

公开(公告)日：2003-02-28

申请号：JP2001246138

申请日：2001-08-14

Applicant: Sony Corp ,  ソニー株式会社

Inventor： KAWASHIMA TOSHITAKA ,  MUKASA TOMOHARU

IPC: H05B33/10 ,  C23C14/04 ,  G09F9/00 ,  G09F9/30 ,  H01L27/32 ,  H01L51/50 ,  H05B33/12 ,  H05B33/14

Abstract: PROBLEM TO BE SOLVED: To provide a pattern forming device and a pattern forming method in which patterning with good position precision can be made even if it is a large area, and an organic electroluminescent display manufactured using the same.
SOLUTION: Rectangular holes H, which are constructed of a short side of which position precision is required to be within the prescribed permissible error range and a long side of which permissible error range is wider than the short side, are formed on the mask 21. Since the mask 21 makes a dimensions change by thermal expansion at the time of forming, the holes H also make position slippage. However, the holes H are formed on the mask 21 only in the positions in which the position slippage in the short side direction is within the prescribed permissible error range.
COPYRIGHT: (C)2003,JPO

Abstract translation: 要解决的问题：为了提供一种图案形成装置和图案形成方法，其中即使是大面积也可以进行具有良好的位置精度的图案化以及使用其形成的有机电致发光显示器。 解决方案：在掩模21上形成矩形孔H，其由位置精度要求在规定允许误差范围内的短边构成，其长边容许误差范围宽于短边。 由于掩模21在成形时通过热膨胀而变化，所以孔H也使位置滑动。 然而，孔H仅在短边方向上的位置滑动处于规定的允许误差范围内的位置形成在掩模21上。

公开(公告)号：JP2002241923A

公开(公告)日：2002-08-28

申请号：JP2001042248

申请日：2001-02-19

Applicant: SONY CORP

Inventor： HAYASHI HIROSHI ,  KAKINUMA MASAYASU ,  KAWASHIMA TOSHITAKA

IPC: C23C14/04 ,  G09F9/00 ,  H01L21/68 ,  G02B1/10

Abstract: PROBLEM TO BE SOLVED: To provide a treatment unit, treatment apparatus and a treatment method by which fine treatment can be executed with high precision even if the range of treatment is extended and also to provide equipment and a method for manufacturing display devices by which display devices can be formed with high precision even in the case where display size is increased. SOLUTION: The treatment unit 10 (11 to 14) is constituted using a mask 18 of relatively small size corresponding to the processing-area block obtained by dividing a substrate-processing area. Because the forming precision of the mask 18 (treatment pore 19) becomes greater than that in the case where the mask 18 of relatively large size corresponding to the substrate-processing area is used, fine film-deposition treatment can be applied to a large-size substrate by using the treatment unit 10 with high precision.

公开(公告)号：JP2002216953A

公开(公告)日：2002-08-02

申请号：JP2001006259

申请日：2001-01-15

Applicant: SONY CORP

Inventor： KAWASHIMA TOSHITAKA ,  KAKINUMA MASAYASU ,  KOBAYASHI MOTOHIRO

IPC: H05B33/06 ,  G09F9/00 ,  G09F9/30 ,  H01L27/32 ,  H01L51/50 ,  H05B33/02 ,  H05B33/04 ,  H05B33/10 ,  H05B33/14 ,  H05B33/22

Abstract: PROBLEM TO BE SOLVED: To provide a display device and its manufacturing method wherein a large-sized screen can be realized while preventing generation of the deterioration of a display element of an image plane part during the manufacturing process by facilitating the electrical connection between the image plane part and a driving circuit part. SOLUTION: The image plane part 12 is installed at the surface side of a substrate 11, and the driving circuit part 13 is respectively installed at the rear face side. Embedded plugs 11A, 11B to electrically connect an organic EL element 14 of the image plane part 12 and the driving circuit part 13 are formed in electrode drawing out holes 11C, 11D installed at the substrate 11. A driving current from the driving circuit part 13 is supplied to a cathode electrode 16 and an anode electrode 18 of the organic EL element 14 via the embedded plugs 11A, 11B, thereby an organic EL layer emits light.

公开(公告)号：JP2002018994A

公开(公告)日：2002-01-22

申请号：JP2000211877

申请日：2000-07-12

Applicant: SONY CORP

Inventor： OKITA HIROYUKI ,  KAWASHIMA TOSHITAKA

IPC: B32B7/02 ,  B32B9/00

Abstract: PROBLEM TO BE SOLVED: To provide a gas barrier material having excellent gas barrier properties. SOLUTION: A pair of gas barrier auxiliary films having an almost equal size and almost equal tensile stress are formed on both main surfaces of a substrate comprising a polymer.

公开(公告)号：JP2000074833A

公开(公告)日：2000-03-14

申请号：JP24665998

申请日：1998-09-01

Applicant: Sony Corp ,  ソニー株式会社

Inventor： KAWASHIMA TOSHITAKA

IPC: H01L21/205 ,  C23C14/54 ,  C23C16/52 ,  G01N21/62 ,  H01L21/203 ,  H01L21/66 ,  H05H1/00

Abstract: PROBLEM TO BE SOLVED: To elongate the life of a gage head, and to execute measurement with high accuracy without requiring consideration about radiant heat from a target (in case of sputtering), plasma or the like at the time of processing and without receiving the influence of a noise.
SOLUTION: This measuring device 21 of a film-forming speed installed in a film-forming device 1 for forming a film by utilizing plasma 15 generated in a chamber 2, is equipped with a light lead-out passage 22 for leading out the light radiated from scattered particles 13 in the plasma 15 from the inside of the chamber 2 to the outside, a photodetector 23 for measuring radiation intensity of the light, an optical filter 24 installed between the light lead-out passage 22 and the photodetector 23 for letting only the light of a specific wavelength component pass, and a data processing device 25 for calculating a film-forming speed from the radiation intensity outputted from the photodetector 23 and from a bias voltage applied on film-formed material 11 or an acceleration voltage of the scattered particles 13.
COPYRIGHT: (C)2000,JPO

Abstract translation: 要解决的问题：为了延长量具头的寿命，并且以高精度执行测量，而不需要考虑来自靶的辐射热（在溅射的情况下），处理时的等离子体等，并且不接收 噪音的影响 解决方案：设置在通过利用在室2中产生的等离子体15形成膜的成膜装置1中的成膜速度的测量装置21装备有用于引出光辐射的光引出通道22 从等离子体15的从室2的内部的散射粒子13到外部，用于测量光的辐射强度的光电检测器23，安装在光导出通道22和光电检测器23之间的仅用于放出的光学滤光器24 特定波长分量的光通过，以及数据处理装置25，用于根据从光电检测器23输出的辐射强度和施加在成膜材料11上的偏置电压或散射的加速电压来计算成膜速度 颗粒13。

公开(公告)号：JP2010147160A

公开(公告)日：2010-07-01

申请号：JP2008321088

申请日：2008-12-17

Applicant: Sony Corp ,  ソニー株式会社

Inventor： KIRITA SHINA ,  KAWASHIMA TOSHITAKA

IPC: H01L29/786 ,  C23C14/08 ,  H01L21/336

Abstract: PROBLEM TO BE SOLVED: To provide a method of manufacturing a thin-film transistor improving reproducibility of a process.
SOLUTION: In the thin-film transistor 1, a gate electrode 12 and an oxide semiconductor film 15 is disposed on a substrate 11 with a gate insulating film 13 interposed therebetween and a source electrode 14A and a drain electrode 14B are disposed in contact with the oxide semiconductor film 15. The oxide semiconductor film 15 is formed by a DC sputtering method and a DC voltage Vdc for formation is set according to a carrier density D. Control of the carrier density D is facilitated by utilizing a proportional relation between the DC voltage Vdc and the carrier density D. A result of control is less susceptible to the accuracy of another equipment such as an MFC (Mass Flow Controller) or the like than in the case of controlling the carrier density by oxygen partial pressure adjustment.
COPYRIGHT: (C)2010,JPO&INPIT

Abstract translation: 解决的问题：提供一种提高工艺的再现性的薄膜晶体管的制造方法。 解决方案：在薄膜晶体管1中，栅极电极12和氧化物半导体膜15设置在基板11上，栅极绝缘膜13插入其间，源电极14A和漏电极14B设置在 与氧化物半导体膜15接触。氧化物半导体膜15通过DC溅射法形成，并且根据载流子浓度D设定用于形成的DC电压Vdc。通过利用载流子密度D的比例关系来促进载流子密度D的控制 直流电压Vdc和载流子密度D.与通过氧分压调节来控制载流子浓度的情况相比，控制结果对于诸如MFC（质量流量控制器）等的其他设备的精度不太敏感。 版权所有（C）2010，JPO＆INPIT

公开(公告)号：JP2010121183A

公开(公告)日：2010-06-03

申请号：JP2008296414

申请日：2008-11-20

Applicant: Sony Corp ,  ソニー株式会社

Inventor： KIRITA SHINA ,  KAWASHIMA TOSHITAKA ,  NAGATA TAKANORI ,  KAMAMORI YUICHI

IPC: C23C14/34 ,  C04B35/453 ,  C23C14/08 ,  C23C14/58 ,  H01B5/14 ,  H01B13/00 ,  H01L21/285

CPC classification number: H01B1/08 ,  C23C14/08 ,  C23C14/086 ,  C23C14/3414

Abstract: PROBLEM TO BE SOLVED: To provide a zinc oxide based sputtering target having a sufficiently high density and a satisfactorily low resistivity and to provide a method of manufacturing the zinc oxide based sputtering target. SOLUTION: The zinc oxide based sputtering target is manufactured by using γ-Al 2 O 3 as a dopant material, and a zinc oxide based transparent conductive film is formed by using the zinc oxide based sputtering target according to a sputtering method. Therein, γ-Al 2 O 3 is contained in the zinc oxide based sputtering target by 1 to 3 wt.%. The zinc oxide based sputtering target is manufactured by mixing zinc oxide powder and γ-Al 2 O 3 powder and sintering the mixed powder at a temperature of 1,150 to 1,300 °C. A particle size of γ-Al 2 O 3 is preferably specified to be 0.5 μm or less. COPYRIGHT: (C)2010,JPO&INPIT

Abstract translation: 要解决的问题：提供具有足够高的密度和令人满意的低电阻率的氧化锌基溅射靶，并提供一种制造氧化锌基溅射靶的方法。 解决方案：通过使用γ-Al O 3 作为掺杂剂材料制造氧化锌基溅射靶，形成氧化锌系透明导电膜 通过使用基于氧化锌的溅射靶根据溅射法。 其中，氧化锌系溅射靶中含有1〜3重量％的γ-Al 2 SB 3 O 3。 氧化锌系溅射靶是通过将氧化锌粉末与γ-Al O 3 粉末混合而制成的，并在1,150〜1300℃的温度下烧结混合粉末。 优选将γ-Al 2 O 3 / SB 3的粒径规定为0.5μm以下。 版权所有（C）2010，JPO＆INPIT

公开(公告)号：JP2009144202A

公开(公告)日：2009-07-02

申请号：JP2007323054

申请日：2007-12-14

Applicant: Sony Corp ,  ソニー株式会社

Inventor： TAKETOMO MIKIHIRO ,  KAWASHIMA TOSHITAKA ,  OSHIMA YOSHIHIRO

IPC: C23C14/06 ,  G02B1/11 ,  G02B1/111

CPC classification number: C23C14/0057 ,  C23C14/025 ,  C23C14/0694 ,  G02B1/11

Abstract: PROBLEM TO BE SOLVED: To provide a method of depositing a transparent optical film which can deposit a transparent optical film having a low refractive index at a high film deposition rate, and to provide the transparent optical film formed by the method of depositing the transparent optical film. SOLUTION: The method of depositing the transparent optical film includes the step of depositing an optical film that is transparent on a substrate 11 by a reactive sputtering process using a Mg-Si metal target 4 in an atmosphere into which a gas 7 of a fluorine-containing compound is introduced and in which the total pressure is adjusted to 8 Pa or more. COPYRIGHT: (C)2009,JPO&INPIT

Abstract translation: 解决的问题：提供一种沉积透明光学膜的方法，该透明光学膜可以以高成膜速率沉积具有低折射率的透明光学膜，并提供通过沉积方法形成的透明光学膜 透明光学膜。 解决方案：沉积透明光学膜的方法包括以下步骤：通过使用Mg-Si金属靶4的反应溅射工艺在基板11上沉积透明的光学膜，在气氛中将气体7 引入含氟化合物，将总压力调节至8Pa以上。 版权所有（C）2009，JPO＆INPIT

公开(公告)号：JP2009140626A

公开(公告)日：2009-06-25

申请号：JP2007313100

申请日：2007-12-04

Applicant: Sony Corp ,  ソニー株式会社

Inventor： KIRITA SHINA ,  KAWASHIMA TOSHITAKA

IPC: H01B13/00 ,  B32B7/02 ,  B32B9/00 ,  C23C14/08 ,  H01B5/14

Abstract: PROBLEM TO BE SOLVED: To provide a method of manufacturing a transparent conductive thin film, which can easily providing both high permeability and low specific resistance of a film, and to provide a transparent conductive thin film manufactured by the same.
SOLUTION: In the method of manufacturing a transparent conductive thin film, a transparent conductive thin film is formed on a substrate 11 by a sputtering method. Using a target 3 of ZnO with Al
2 O
3 doped or ZnO with Ga
2 O
3 doped, a pulsating DC voltage of high frequency is applied from a pulse DC power source 5 between the substrate 11 and the target 3, without introducing oxygen gas under Ar gas atmosphere, for sputter film-forming.
COPYRIGHT: (C)2009,JPO&INPIT

Abstract translation: 要解决的问题：提供一种可以容易地提供膜的高透过性和低电阻率的透明导电薄膜的制造方法，并提供由其制造的透明导电薄膜。 解决方案：在制造透明导电薄膜的方法中，通过溅射法在基板11上形成透明导电薄膜。 使用ZnO掺杂的掺杂Ga 2 O 3或SB 3的掺杂的ZnO 3的靶3，掺杂了Ga 2 SB 3 O 3 / 脉冲直流电压从基板11和靶3之间的脉冲直流电源5施加，而不会在氩气气氛下引入氧气，用于溅射成膜。 版权所有（C）2009，JPO＆INPIT