PRIVACY TELEPHONE EQUIPMENT
    75.
    发明专利

    公开(公告)号:JPS6218141A

    公开(公告)日:1987-01-27

    申请号:JP15661685

    申请日:1985-07-16

    Applicant: SONY CORP

    Abstract: PURPOSE:To prevent spread of the spectrum of an input signal and to ensure the number of keys for many privacy codes by providing respectively a cascade connection circuit of circuit blocks to the transmission and reception sides, and changing the number of cascade connection stages, delay quantity and coefficients. CONSTITUTION:An analog voice input signal is digitized via a LPF12 and fed to a cascade connection circuit comprising circuit blocks 21, 22.... The circuit has a digital filter characteristic and the required number of stages is set. Further, the delay quantity of each delay circuit and each coefficient of each coefficient multiplier are set variably. Then an output signal goes to an analog signal via a D/A converter 15 and a LPF16, outputted at an output terminal 17, modulation is applied and the result is transmitted by the radio wave. The analog signal demodulated by a receiver is subject to descrambling processing to have an opposite characteristic to that of a descrambling processing at the transmission side by the reception side circuit of the similar constitution, and a voice signal with high quantity is extracted from an output signal 67.

    INSERTING SYSTEM OF SYNCHRONIZING SIGNAL

    公开(公告)号:JPS6041339A

    公开(公告)日:1985-03-05

    申请号:JP14946383

    申请日:1983-08-16

    Applicant: SONY CORP

    Abstract: PURPOSE:To eliminate the influence of a transmission line and to apply this system to the transmission system using a single information signal, by inserting plural synchronizing signals, which include signal contents short in period length at least according as the period length is extended, into a specific information signal. CONSTITUTION:An audio signal inputted to a terminal 1 of an encoder is converted by an A/D converter 4, and digital data is processed in a signal processing device 7 with an RAM8 and is sent to a D/A converter 14 through a digital volume 11 and a switch 12. In this case, three synchronizing signals S, B, and P are inserted from a synchronizing signal generator 13 to the front of each segment. Signals S, B, and P are respective start signals of a scramble pattern, block, and segment. The signal S includes components of signals B and P, and the signal B includes components of the signal P, and they include signal contents also.

    Compensating circuit for time axis
    78.
    发明专利
    Compensating circuit for time axis 失效
    时间轴补偿电路

    公开(公告)号:JPS59119513A

    公开(公告)日:1984-07-10

    申请号:JP23059382

    申请日:1982-12-27

    Applicant: Sony Corp

    CPC classification number: G11B20/10527

    Abstract: PURPOSE:To compensate a time axis with a low cost and without sacrificing the frequency band of the transmitted information signal by inserting the synchronizing signals into the information signal with fixed intervals in a recording mode and detecting those synchronizing signals in a reproduction mode and then controlling a reproduction system so as to obtain a fixed interval for the synchronizing signal. CONSTITUTION:The synchronizing signals are inserted with fixed intervals into the reproduced sound signal sent from an input terminal 21 in a recording mode. The synchronizing signal detected by a synchronism detector 30 is supplied to a counter 31, and the intervals of synchronizing signals are measured in the form of the number of clock pulses of f0/N frequency. The measured intervals are supplied to a writing counter 28, a sampling/holding circuit 23, an A/D converter 24 and an RAM25 respectively. While the clock pulse of f0/N frequency which is obtained at the output side of a frequency divider 33 is supplied to the RAM 25 and a D/A converter 26 from a reading counter 29 for control. As a result, the sound information on the compensated analog signal is extracted at an output terminal 27. In such a way, the time axis can be compensated without sacrificing the frequency band of the information signal.

    Abstract translation: 目的:为了以低成本补偿时间轴,并且通过在记录模式下以固定的间隔将同步信号插入到信息信号中而不牺牲发送的信息信号的频带,并且在再现模式中检测那些同步信号,然后控制 再现系统,以获得用于同步信号的固定间隔。 构成:将同步信号以固定的间隔插入到以记录模式从输入端子21发送的再生声音信号中。 由同步检测器30检测出的同步信号被提供给计数器31,以f0 / N频率的时钟脉冲数的形式测量同步信号的间隔。 测量的间隔分别提供给写入计数器28,采样/保持电路23,A / D转换器24和RAM25。 而在分频器33的输出侧获得的f0 / N频率的时钟脉冲从用于控制的读取计数器29提供给​​RAM25和D / A转换器26。 结果,在输出端子27处提取关于补偿的模拟信号的声音信息。以这种方式,可以补偿时间轴而不牺牲信息信号的频带。

    ANTENNA CIRCUIT
    79.
    发明专利

    公开(公告)号:JPS5792917A

    公开(公告)日:1982-06-09

    申请号:JP16875380

    申请日:1980-11-28

    Applicant: SONY CORP

    Abstract: PURPOSE:To extend the mesial band width and to improve the sensibility, by selecting loads Q of the primary-side and secondary-side tuning circuits so that a specific condition of an antenna where the primary and secondary tuning coils are wound around a ferromagnetic coil is satisfied. CONSTITUTION:In respect to a bar antenna 1, a primary-side tuning coil 3a and a secondary-side tuning coil 3b are wound around a ferromagnetic core (bar- shaped core) 2. A resistance RS is connected to either of a primary-side tuning circuit 5a and a secondary-side tuning circuit 5b. Loads Q of primary and secondary-side tuning circuits are so selected that equations (1)-(3) are satisfied. In equations BW3, QL1, QL2, Q01, Q02, A, and F0 indicate the mesial band width of the antenna circuit, the load Q of the circuit 5a, the load Q of the circuit 5b, the no-load Q of the tuning inductance of the primary-side tuning circuit, the no-load Q of the tuning inductance of the secondary-side tuning circuit, a coefficient, and the tuning center frequency respectively (A=QL1/QL2>1). Thus, the antenna circuit having a wide mesial band width, a high sensibility, and good interference characteristics is obtained.

    BANDDPASS AMPLIFIER
    80.
    发明专利

    公开(公告)号:JPS5687914A

    公开(公告)日:1981-07-17

    申请号:JP16527279

    申请日:1979-12-19

    Applicant: SONY CORP

    Abstract: PURPOSE:To obtain the band pass characteristics with high selectivity and low distortion factor, by constituting the intermediate frequency circuit through alternate cascade connection of a plurality of ceramic filters and buffer amplifiers. CONSTITUTION:N sets of ceramic filters 1A-1N are in cascade connection and buffer amplifiers 3A-3M are inserted between filters 1A-1N. As the filters 1A- 1N, those having the amplitude characteristics of Bessel or the similar are used. Further, as the amplifiers 3A-3M, those having the gain enabling to compensate the insertion loss of the filters 1A-1N, having the broader dynamic range even at greater input without limiter effect even at a greater input and satisfying the conditions that the input and output impedances are not charged, are used. With this constitution, the amplitude characteristics of filters can take broader band width and enables low distortion factor. Further, by the selection of N sets, the degree of selectivity can be arbitrarily a desired value.

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