公开(公告)号：US20130009713A1

公开(公告)日：2013-01-10

申请号：US13614498

申请日：2012-09-13

Applicant: Yu NISHITANI ,  Yukihiro KANEKO ,  Michihito UEDA

Inventor： Yu NISHITANI ,  Yukihiro KANEKO ,  Michihito UEDA

IPC: H03B5/24

CPC classification number: H03B5/20 ,  H01G7/06 ,  H01L23/64 ,  H01L25/16 ,  H01L28/20 ,  H01L28/40 ,  H01L28/55 ,  H01L28/56 ,  H01L2924/0002 ,  H03B5/24 ,  H03B2200/004 ,  H03B2201/02 ,  H03B2201/0208 ,  H01L2924/00

Abstract: A resistance-capacitance oscillation circuit comprises an amplifier and a phase shifting circuit. The phase shifting circuit comprises at least three resistance-capacitance circuit elements, which comprise a resistance and a capacitance. At least one of the resistance-capacitance circuit elements comprises a variable resistance and a variable capacitance. The variable resistance is formed of a first electrode, a second electrode, a part of a semiconductor film, a part of a ferroelectric film, and a fourth electrode. The variable capacitor is formed of the second electrode, a third electrode, a fifth electrode, another part of the ferroelectric film, another part of the semiconductor film, and a paraelectric film.

Abstract translation: 电阻 - 电容振荡电路包括放大器和移相电路。 相移电路包括至少三个电阻 - 电容电路元件，其包括电阻和电容。 电阻 - 电容电路元件中的至少一个包括可变电阻和可变电容。 可变电阻由第一电极，第二电极，半导体膜的一部分，铁电体膜的一部分和第四电极形成。 可变电容器由第二电极，第三电极，第五电极，铁电体膜的另一部分，半导体膜的另一部分和顺电膜形成。

公开(公告)号：US07449963B2

公开(公告)日：2008-11-11

申请号：US11754804

申请日：2007-05-29

Applicant: Ramon A. Gomez

Inventor： Ramon A. Gomez

IPC: H03L7/00

CPC classification number: H03L7/00 ,  H03B5/1212 ,  H03B5/1215 ,  H03B5/1228 ,  H03B5/1243 ,  H03B5/1253 ,  H03B5/1265 ,  H03B5/1278 ,  H03B2200/0046 ,  H03B2200/0048 ,  H03B2200/005 ,  H03B2201/02 ,  H03B2201/0208 ,  H03B2201/025 ,  H03D7/165 ,  H03D7/18 ,  H03J5/244 ,  H03J2200/10 ,  H03L7/0898 ,  H03L7/093 ,  H03L7/099 ,  H03L7/10 ,  H03L7/107 ,  H03L7/1072 ,  H03L7/18

Abstract: A gain compensator compensates for the gain variation of a varactor-tuned voltage tuned oscillator (VCO) in a phase lock loop (PLL). The VCO includes a parallel LC circuit having multiple fixed capacitors that can be switched-in or switched-out of the LC circuit according to a capacitor control signal to perform band-select tuning of the VCO. The gain compensator compensates for the variable VCO gain by generating a charge pump reference current that is based on the same capacitor control signal that controls the fixed capacitors in the LC circuit. The gain compensator generates the charge pump reference current by replicating a reference scale current using unit current sources. The number of times the reference scale current is replicated is based on the fixed capacitance that is switched-in to the LC circuit and therefore the frequency band of the PLL. The reference scale current is generated based on a PLL control that specifics certain PLL characteristics such as reference frequency, loop bandwidth, and loop damping. Therefore, the reference pump current can be efficiently optimized for-changing PLL operating conditions, in addition to compensating for variable VCO gain.

Abstract translation: 增益补偿器补偿锁相环（PLL）中变容二极管调谐电压调谐振荡器（VCO）的增益变化。 VCO包括具有多个固定电容器的并联LC电路，其可以根据电容器控制信号切换或切换出LC电路，以执行VCO的频带选择调谐。 增益补偿器通过产生基于控制LC电路中的固定电容器的相同电容器控制信号的电荷泵参考电流来补偿可变VCO增益。 增益补偿器通过使用单位电流源复制参考刻度电流来产生电荷泵参考电流。 参考比例电流复制的次数是基于切换到LC电路的固定电容，因此是PLL的频带。 参考比例电流是基于特定于参考频率，环路带宽和环路阻尼等特定PLL特性的PLL控制产生的。 因此，除了补偿可变VCO增益之外，参考泵电流可以有效地优化用于改变PLL工作条件。

公开(公告)号：US20050168297A1

公开(公告)日：2005-08-04

申请号：US11095117

申请日：2005-03-31

Applicant: Ramon Gomez

Inventor： Ramon Gomez

IPC: H03B1/00 ,  H03B5/12 ,  H03D7/18 ,  H03J5/24 ,  H03L7/00 ,  H03L7/089 ,  H03L7/099 ,  H03L7/10 ,  H03L7/18 ,  H03B5/00

CPC classification number: H03L7/00 ,  H03B5/1212 ,  H03B5/1215 ,  H03B5/1228 ,  H03B5/1243 ,  H03B5/1253 ,  H03B5/1265 ,  H03B5/1278 ,  H03B2200/0046 ,  H03B2200/0048 ,  H03B2200/005 ,  H03B2201/02 ,  H03B2201/0208 ,  H03B2201/025 ,  H03D7/165 ,  H03D7/18 ,  H03J5/244 ,  H03J2200/10 ,  H03L7/0898 ,  H03L7/093 ,  H03L7/099 ,  H03L7/10 ,  H03L7/107 ,  H03L7/1072 ,  H03L7/18

Abstract: A gain compensator compensates for the gain variation of a varactor-tuned voltage tuned oscillator (VCO) in a phase lock loop (PLL). The VCO includes a parallel LC circuit having multiple fixed capacitors that can be switched-in or switched-out of the LC circuit according to a capacitor control signal to perform band-select tuning of the VCO. The gain compensator compensates for the variable VCO gain by generating a charge pump reference current that is based on the same capacitor control signal that controls the fixed capacitors in the LC circuit. The gain compensator generates the charge pump reference current by replicating a reference scale current using unit current sources. The number of times the reference scale current is replicated is based on the fixed capacitance that is switched-in to the LC circuit and therefore the frequency band of the PLL. The reference scale current is generated based on a PLL control that specifics certain PLL characteristics such as reference frequency, loop bandwidth, and loop damping. Therefore, the reference pump current can be efficiently optimized for changing PLL operating conditions, in addition to compensating for variable VCO gain.

公开(公告)号：US20050104677A1

公开(公告)日：2005-05-19

申请号：US11019451

申请日：2004-12-23

Applicant: Ramon Gomez

Inventor： Ramon Gomez

IPC: H03B1/00 ,  H03B5/12 ,  H03D7/18 ,  H03J5/24 ,  H03L7/00 ,  H03L7/089 ,  H03L7/099 ,  H03L7/10 ,  H03L7/18 ,  H03B5/00

CPC classification number: H03L7/00 ,  H03B5/1212 ,  H03B5/1215 ,  H03B5/1228 ,  H03B5/1243 ,  H03B5/1253 ,  H03B5/1265 ,  H03B5/1278 ,  H03B2200/0046 ,  H03B2200/0048 ,  H03B2200/005 ,  H03B2201/02 ,  H03B2201/0208 ,  H03B2201/025 ,  H03D7/165 ,  H03D7/18 ,  H03J5/244 ,  H03J2200/10 ,  H03L7/0898 ,  H03L7/093 ,  H03L7/099 ,  H03L7/10 ,  H03L7/107 ,  H03L7/1072 ,  H03L7/18

Abstract: A gain compensator compensates for the gain variation of a varactor-tuned voltage tuned oscillator (VCO) in a phase lock loop (PLL). The VCO includes a parallel LC circuit having multiple fixed capacitors that can be switched-in or switched-out of the LC circuit according to a capacitor control signal to perform band-select tuning of the VCO. The gain compensator compensates for the variable VCO gain by generating a charge pump reference current that is based on the same capacitor control signal that controls the fixed capacitors in the LC circuit. The gain compensator generates the charge pump reference current by replicating a reference scale current using unit current sources. The number of times the reference scale current is replicated is based on the fixed capacitance that is switched-in to the LC circuit and therefore the frequency band of the PLL. The reference scale current is generated based on a PLL control that specifics certain PLL characteristics such as reference frequency, loop bandwidth, and loop damping. Therefore, the reference pump current can be efficiently optimized for changing PLL operating conditions, in addition to compensating for variable VCO gain.

公开(公告)号：US6137370A

公开(公告)日：2000-10-24

申请号：US234981

申请日：1999-01-22

Applicant: Takeshi Yamamoto

Inventor： Takeshi Yamamoto

IPC: H03K3/354 ,  H03B1/00 ,  H03B5/00 ,  H03B5/24 ,  H03K3/0231 ,  H03B5/02

CPC classification number: H03B5/24 ,  H03B2201/02

Abstract: An oscillator having a feedback loop circuit formed by two transductors and one amplifier, and two capacitors respectively connected to the outputs of these transconductors. The transconductors and the amplifier are constructed by common-source configuration transistors to which common bias current is supplied. Since they have invert characteristics for the input voltage, the feedback loop is also self-biased by means of negative feedback operation. The oscillation signal is outputted from an arbitrary position on the feedback loop of the oscillator. According to the oscillator as constituted, the oscillation frequency can be controlled in a wide range by varying the bias current to the common-source transistors.

Abstract translation: 具有由两个转换器和一个放大器形成的反馈回路电路的振荡器和分别连接到这些跨导器的输出的两个电容器。 跨导体和放大器由共源偏置电流供给的共源晶体管构成。 由于它们对输入电压具有反转特性，所以反馈回路也通过负反馈操作自偏置。 振荡信号从振荡器的反馈回路上的任意位置输出。 根据构成的振荡器，通过改变到共源极晶体管的偏置电流，可以在宽范围内控制振荡频率。

公开(公告)号：US5945884A

公开(公告)日：1999-08-31

申请号：US988435

申请日：1997-12-11

Applicant: Kenji Nakatsuka

Inventor： Kenji Nakatsuka

IPC: H03B5/08 ,  H03B1/00 ,  H03B5/12 ,  H03B5/18

CPC classification number: H03B5/1231 ,  H03B5/1203 ,  H03B5/1243 ,  H03B2200/004 ,  H03B2200/0086 ,  H03B2200/0088 ,  H03B2201/02 ,  H03B5/1847

Abstract: The object of this invention is an oscillation circuit that increases the Q of the parallel resonance circuit and increases the C/N (carrier-to-noise) ratio. The oscillation circuit contains two feedback capacitors connected between the base and emitter and between the emitter and collector of a transistor. Two inductors are also connected in series between the base and the collector of the transistor. One end of a resistor is connected to the emitter of the transistor and the other end is connected between the two inductors. The feedback capacitors and inductors constitute a parallel resonance circuit that may be tuned to create an equipotential across the ends of the resistor so that no current flows through it thus increasing both Q and the C/N ratio.

Abstract translation: 本发明的目的是增加并联谐振电路的Q并增加C / N（载波对噪声）比的振荡电路。 振荡电路包含连接在基极和发射极之间以及晶体管的发射极和集电极之间的两个反馈电容器。 两个电感器也串联连接在晶体管的基极和集电极之间。 电阻器的一端连接到晶体管的发射极，另一端连接在两个电感器之间。 反馈电容器和电感器构成并联谐振电路，其可以被调谐以在电阻器的两端形成等电位，使得没有电流流过它，从而增加Q和C / N比。

公开(公告)号：US5847616A

公开(公告)日：1998-12-08

申请号：US764287

申请日：1996-12-12

Applicant: Maisy Mun Lan Ng ,  Kheng Boon Peh ,  Jie Liang

Inventor： Maisy Mun Lan Ng ,  Kheng Boon Peh ,  Jie Liang

IPC: H03B1/00 ,  H03B5/24 ,  H03K3/0231 ,  H03B5/04

CPC classification number: H03K3/0231 ,  H03B5/24 ,  H03B2200/0058 ,  H03B2200/0092 ,  H03B2201/02

Abstract: The present invention provides a voltage controlled oscillator with improved noise immunity and minimized variation due to manufacturing process, power supply and operating temperature changes. The voltage controlled oscillator consists of fully differential connected ring oscillator that includes a plurality of differentially connected delay elements. The ring oscillator responds to a control current signal for controlling the frequency of oscillation. A voltage to current converter converts the input tuning voltage to an output current for the controlling of the ring oscillator. The delay element consists of two source coupled P-channel transistors connected to a current source. The drains of the P-channel transistors are each connected to a voltage controlled impedance that changes the delay characteristics of the delay element in response to the input tuning voltage. A voltage reference generator provides the reference voltage necessary to determine the amplitude out of the delay element and is insensitive to variations due to manufacturing process, power supply, and operating temperature. A fully differential comparator provides symmetrical loading for the ring oscillator and the high gain necessary to provide the output drive capability.

Abstract translation: 本发明提供了一种压控振荡器，其具有改进的抗噪声能力，并且由于制造过程，电源和工作温度变化而导致的最小化变化。 压控振荡器由全差分连接的环形振荡器组成，其包括多个差分连接的延迟元件。 环形振荡器响应控制电流信号来控制振荡频率。 电压/电流转换器将输入调谐电压转换为用于控制环形振荡器的输出电流。 延迟元件由连接到电流源的两个源极耦合P沟道晶体管组成。 P沟道晶体管的漏极各自连接到电压控制的阻抗，其响应于输入调谐电压改变延迟元件的延迟特性。 电压参考发生器提供了确定延迟元件的振幅所必需的参考电压，并且对由于制造过程，电源和工作温度造成的变化不敏感。 全差分比较器为环形振荡器提供对称负载，并提供必要的高增益以提供输出驱动能力。

公开(公告)号：US5821824A

公开(公告)日：1998-10-13

申请号：US920186

申请日：1997-08-25

Applicant: Ray Alan Mentzer

Inventor： Ray Alan Mentzer

IPC: H03B1/00 ,  H03F3/45 ,  H03K3/0231 ,  H03B5/24 ,  H03B5/04 ,  H03L1/00

CPC classification number: H03F3/45183 ,  H03K3/0231 ,  H03B2200/0092 ,  H03B2201/02 ,  H03F2203/45371 ,  H03F2203/45392 ,  H03F2203/45646 ,  H03F2203/45658

Abstract: A multistage voltage-to-current ("VI") converter for producing, in response to an input voltage, an output voltage useful for controlling a voltage-controlled oscillator ("VCO"). Preferably, the transfer function of the VI converter is such that the output clock frequency-to-input voltage transfer function (of a system including the VI converter and the VCO) is at least approximately linear over a desired output clock frequency range and has a desired slope in such range. In preferred embodiments, the multistage VI converter includes three differential amplifier stages connected in parallel. Each stage has a tail current and receives a reference voltage (the tail currents and reference voltages typically differ from stage to stage), and produces a component of a total current. The total current determines the output voltage. Optionally, bias circuitry is provided for producing nonzero output voltage in response to zero input voltage. In other embodiments, the multistage VI converter includes two stages or more than three stages connected in parallel, each stage producing a component of a total current which determines the output voltage. The number of stages, and the tail current and reference voltage (and resistor values and transistor characteristics) of each stage, are chosen to achieve a desired output voltage-to-input voltage transfer function. Another aspect of the invention is a VCO system including any embodiment of the multistage VI converter of the invention.

Abstract translation: 用于响应于输入电压产生用于控制压控振荡器（“VCO”）的输出电压的多级电压 - 电流（“VI”）转换器。 优选地，VI转换器的传递函数使得（包括VI转换器和VCO的系统）的输出时钟频率 - 输入电压传递函数在期望的输出时钟频率范围上至少近似线性，并且具有 所需坡度在这样的范围内。 在优选实施例中，多级VI转换器包括并联连接的三个差分放大器级。 每个阶段都有一个尾电流并接收一个参考电压（尾电流和参考电压通常不同于一个阶段），并产生一个总电流的分量。 总电流决定输出电压。 可选地，提供偏置电路用于响应于零输入电压产生非零输出电压。 在其他实施例中，多级VI转换器包括并联连接的两级或三级以上，每级产生确定输出电压的总电流的分量。 选择级数和每级的尾电流和参考电压（和电阻值和晶体管特性）以实现期望的输出电压到输入电压传递函数。 本发明的另一方面是包括本发明的多级VI转换器的任何实施例的VCO系统。

公开(公告)号：US5767752A

公开(公告)日：1998-06-16

申请号：US702352

申请日：1996-08-23

Applicant: Sang-Heum Yeon

Inventor： Sang-Heum Yeon

IPC: H03C3/09 ,  H03B1/00 ,  H03C3/00 ,  H03C3/02 ,  H03C3/14

CPC classification number: H03C3/02 ,  H03B2200/0026 ,  H03B2200/0058 ,  H03B2200/008 ,  H03B2201/02 ,  H03C2200/005

Abstract: A frequency modulator controls the center frequency and modulation factor at the same time with one control signal. The frequency modulator includes a voltage-to-current converter that receives an input voltage signal to be modulated, a reference voltage signal, and a control voltage signal, and generates an output current signal by combining the input voltage signal and the control voltage signal. The input voltage signal is amplified by a transconductance amplifier. The control voltage signal is converted into a gain signal which is used to vary the transconductance of the amplifier. A voltage controlled oscillator generates a frequency modulated signal responsive to the output current signal. The center frequency and modulation factor can be controlled by adjusting the value of a resistor in the current-to-voltage converter, a capacitor in the voltage control oscillator, or the control voltage signal.

Abstract translation: 频率调制器通过一个控制信号同时控制中心频率和调制因子。 频率调制器包括接收要调制的输入电压信号的电压 - 电流转换器，参考电压信号和控制电压信号，并且通过组合输入电压信号和控制电压信号来产生输出电流信号。 输入电压信号由跨导放大器放大。 控制电压信号被转换成用于改变放大器跨导的增益信号。 压控振荡器响应于输出电流信号产生调频信号。 可以通过调整电流 - 电压转换器中的电阻值，压控振荡器中的电容器或控制电压信号来控制中心频率和调制系数。

公开(公告)号：US5686868A

公开(公告)日：1997-11-11

申请号：US564429

申请日：1995-11-29

Applicant: Kouichi Hasegawa ,  Kazuyuki Yuda

Inventor： Kouichi Hasegawa ,  Kazuyuki Yuda

IPC: H01L27/04 ,  H01L21/822 ,  H03B1/00 ,  H03L7/07 ,  H03L7/08 ,  H03L7/099 ,  H03L7/18

CPC classification number: C04B18/022 ,  H03L7/07 ,  H03L7/08 ,  H03L7/099 ,  H03B2201/02

Abstract: A semiconductor IC used for synthesizer having a phase locked loop PLL, a voltage controlled oscillator (VCO) and a mixer (MIX) for intermediate frequency is formed on a one chip silicon wafer. A semiconductor IC used for synthesizer having a VCO portion and an internal circuit such as PLL on a silicon wafer chip includes a differential buffer circuit which separates the VCO portion from the internal circuit. A capacitor (C1) is connected to an output of the VCO portion. A constant voltage source (V1) may be connected to respective input of the differential transistors (Q4, Q5). Transistors (Q6,Q7) provide emitter follower output circuits in the differential buffer. Respective emitters of the transistors (Q6,Q7) are connected to corresponding constant current sources (I1,I2).

Abstract translation: 在单芯片硅晶片上形成用于具有锁相环PLL的合成器的半导体IC，压控振荡器（VCO）和用于中频的混频器（MIX）。 用于具有VCO部分的合成器和硅晶片芯片上的诸如PLL之类的内部电路的合成器的半导体IC包括将VCO部分与内部电路分离的差分缓冲电路。 电容器（C1）连接到VCO部分的输出端。 恒定电压源（V1）可以连接到差分晶体管（Q4，Q5）的相应输入端。 晶体管（Q6，Q7）在差分缓冲器中提供射极跟随器输出电路。 晶体管（Q6，Q7）的各个发射极连接到相应的恒流源（I1，I2）。