公开(公告)号：US20140161166A1

公开(公告)日：2014-06-12

申请号：US13967530

申请日：2013-08-15

Applicant: Rambus Inc.

Inventor： Andrew Ho ,  Vladimir Stojanovic ,  Bruno W. Garlepp ,  Fred F. Chen

IPC: H04B17/00

CPC classification number: H04B17/29 ,  G01R31/31711 ,  G06F11/08 ,  H04B17/21 ,  H04L1/20 ,  H04L1/241 ,  H04L1/242 ,  H04L7/033 ,  H04L7/043 ,  H04L7/10 ,  H04L25/03006 ,  H04L25/03057 ,  H04L25/03146 ,  H04L25/03949 ,  H04L27/01

Abstract: Described are methods and circuits for margin testing digital receivers. These methods and circuits prevent margins from collapsing in response to erroneously received data, and can thus be used in receivers that employ historical data to reduce intersymbol interference (ISI). Some embodiments detect receive errors for input data streams of unknown patterns, and can thus be used for in-system margin testing. Such systems can be adapted to dynamically alter system parameters during device operation to maintain adequate margins despite fluctuations in the system noise environment due to e.g. temperature and supply-voltage changes. Also described are methods of plotting and interpreting filtered and unfiltered error data generated by the disclosed methods and circuits. Some embodiments filter error data to facilitate pattern-specific margin testing.

公开(公告)号：US20130162279A1

公开(公告)日：2013-06-27

申请号：US13335661

申请日：2011-12-22

Applicant: D. Brice Achkir ,  Marco Mazzini ,  Stefano Riboldi ,  Cristiana Muzio

Inventor： D. Brice Achkir ,  Marco Mazzini ,  Stefano Riboldi ,  Cristiana Muzio

IPC: G01R31/00

CPC classification number: G01R1/067 ,  G01R31/3185 ,  H04L1/241 ,  H04L1/243

Abstract: According to an example implementation, a universal tester includes a host interface slot connected to a first pluggable host card during an electrical test mode of operation to provide a stressed electrical signal to a host under test. The host interface slot is connected to a second pluggable host card during an optical test mode of operation, the second pluggable host card including an electrical-optical conversion block to convert a stressed electrical signal to a stressed optical signal that is provided to a host under test. A stressor generator may operation in pass-through mode or a loop-back mode.

Abstract translation: 根据示例实现，通用测试器包括在电测试操作模式期间连接到第一可插拔主机卡的主机接口插槽，以向被测试主机提供受压电信号。 在光学测试操作模式期间，主机接口插槽连接到第二可插拔主机卡，第二可插拔主机卡包括电光转换模块，用于将应力电信号转换为被提供给主机的应力光信号 测试。 压力发生器可以在直通模式或环回模式下操作。

公开(公告)号：US08125259B2

公开(公告)日：2012-02-28

申请号：US11968942

申请日：2008-01-03

Applicant: Xingdong Dai ,  Weiwei Mao ,  Max J. Olsen ,  Geoffrey Zhang

Inventor： Xingdong Dai ,  Weiwei Mao ,  Max J. Olsen ,  Geoffrey Zhang

IPC: H03K3/017

CPC classification number: H04L1/241 ,  H03M9/00 ,  H04L1/205

Abstract: A method and system for modeling and calibrating duty cycle distortion (DCD) of a Serializer and Deserializer (SerDes) device, including first generating a clock DCD signal. Once the clock DCD signal is generated, it is calibrating based upon results obtained from a filtering process of the clock DCD signal. Once the clock DCD signal is calibrated, a data DCD signal is generated and calibrated based upon results obtained from a filtering process of the data DCD signal.

Abstract translation: 一种用于建模和校准串行器和解串器（SerDes）器件的占空比失真（DCD）的方法和系统，包括首先产生时钟DCD信号。 一旦产生时钟DCD信号，它就是根据从时钟DCD信号的滤波处理获得的结果进行校准。 一旦时钟DCD信号被校准，基于从数据DCD信号的滤波处理获得的结果来产生和校准数据DCD信号。

公开(公告)号：US07590175B2

公开(公告)日：2009-09-15

申请号：US11413584

申请日：2006-04-28

Applicant: Brian S. Leibowitz ,  Bruno W. Garlepp

Inventor： Brian S. Leibowitz ,  Bruno W. Garlepp

IPC: H03H7/30 ,  H04L27/00

CPC classification number: H04L25/03057 ,  G01R31/31709 ,  G01R31/31711 ,  H04J11/0023 ,  H04L1/20 ,  H04L1/241 ,  H04L1/242 ,  H04L1/244 ,  H04L5/006 ,  H04L7/033 ,  H04L25/03146

Abstract: Described are methods and circuits for margin testing digital receivers. These methods and circuits prevent margins from collapsing in response to erroneously received data, and can thus be used in receivers that employ historical data to reduce intersymbol interference (ISI). Some embodiments allows feedback timing to be adjusted independent of the sample timing to measure the effects of some forms of phase misalignment and jitter.

Abstract translation: 描述了数字接收机边缘测试的方法和电路。 这些方法和电路可以防止误差响应于错误接收的数据而崩溃，并且因此可以用于采用历史数据的接收机来减少符号间干扰（ISI）。 一些实施例允许独立于采样定时来调整反馈定时，以测量某些形式的相位未对准和抖动的影响。

公开(公告)号：US20090177457A1

公开(公告)日：2009-07-09

申请号：US11968942

申请日：2008-01-03

Applicant: Xingdong Dai ,  Weiwei Mao ,  Max J. Olsen ,  Geoffrey Zhang

Inventor： Xingdong Dai ,  Weiwei Mao ,  Max J. Olsen ,  Geoffrey Zhang

IPC: G06G7/62

CPC classification number: H04L1/241 ,  H03M9/00 ,  H04L1/205

Abstract: A method and system for modeling and calibrating duty cycle distortion (DCD) of a Serializer and Deserializer (SerDes) device, including first generating a clock DCD signal. Once the clock DCD signal is generated, it is calibrating based upon results obtained from a filtering process of the clock DCD signal. Once the clock DCD signal is calibrated, a data DCD signal is generated and calibrated based upon results obtained from a filtering process of the data DCD signal.

Abstract translation: 一种用于建模和校准串行器和解串器（SerDes）器件的占空比失真（DCD）的方法和系统，包括首先产生时钟DCD信号。 一旦产生时钟DCD信号，它就是根据从时钟DCD信号的滤波处理获得的结果进行校准。 一旦时钟DCD信号被校准，基于从数据DCD信号的滤波处理获得的结果来产生和校准数据DCD信号。

公开(公告)号：US07472318B2

公开(公告)日：2008-12-30

申请号：US11477038

申请日：2006-06-28

Applicant: Nong Fan ,  Tuan Hoang ,  Hongtao Jiang

Inventor： Nong Fan ,  Tuan Hoang ,  Hongtao Jiang

IPC: G06F11/00

CPC classification number: H04L1/243 ,  H04L1/203 ,  H04L1/241

Abstract: A method and system for evaluating performance of a device by on-chip determination of BER may include establishing and generating PRBS test packets in a closed communication path internally within a physical layer device (PLD) and a remote PLD. A BER for the PLD may be determined from within the PLD based on a comparison of at least a portion of the generated test packets with at least a portion of the generated test packets transmitted over the closed communication path received by the PLD via the closed communication path from the remote PLD. A transmit path of the PLD may be internally coupled to a receive path of the PLD, and a receive path of the PLD may be internally coupled to a transmit path of the PLD. The PLD may be internally configured to operate in an internal optical loopback mode or an internal electrical loopback mode.

Abstract translation: 用于通过片上确定BER来评估设备的性能的方法和系统可以包括在物理层设备（PLD）和远程PLD内部的闭合通信路径中建立和生成PRBS测试分组。 基于PLD中的BER，可以基于生成的测试分组的至少一部分与由PLD经由封闭通信接收的封闭通信路径发送的生成的测试分组的至少一部分进行比较来确定PLD的BER 从远程PLD的路径。 PLD的发送路径可以内部耦合到PLD的接收路径，并且PLD的接收路径可以内部耦合到PLD的发送路径。 PLD可以内部配置为在内部光环回模式或内部电气环回模式下工作。

公开(公告)号：US20080192640A1

公开(公告)日：2008-08-14

申请号：US12028479

申请日：2008-02-08

Applicant: Richard D. Simpson

Inventor： Richard D. Simpson

IPC: G01R31/08

CPC classification number: H04L1/241 ,  H04L2025/03477 ,  H04L2025/0349

Abstract: A loopback circuit connecting the output of a receiver section to a transmitter section of a transceiver circuit has two or more loopback channels. In this way, the data rate is reduced, reducing the signal loss that occurs even over such short distances at very high data rates.

Abstract translation: 将接收机部分的输出连接到收发器电路的发射机部分的环回电路具有两个或多个环回信道。 以这种方式，数据速率降低，即使在非常高的数据速率下在这么短的距离上也能减少信号损失。

公开(公告)号：US20070168770A1

公开(公告)日：2007-07-19

申请号：US11477038

申请日：2006-06-28

Applicant: Nong Fan ,  Tuan Hoang ,  Hongtao Jiang

Inventor： Nong Fan ,  Tuan Hoang ,  Hongtao Jiang

IPC: G06F11/00

CPC classification number: H04L1/243 ,  H04L1/203 ,  H04L1/241

Abstract: A method and system for evaluating performance of a device by on-chip determination of BER may include establishing a closed communication path internally within a physical layer device (PLD). A bit error rate for the PLD may be determined from within the PLD based on a ratio of a number of bits in test packets generated within the PLD that are transmitted over the closed communication path, and a number of transmitted bits in the test packets that are received by the PLD via the closed communication path. A transmit path of the PLD may be internally coupled to a receive path of the PLD, and a receive path of the PLD may be internally coupled to a transmit path of the PLD. The PLD may be internally configured to operate in an internal optical loopback mode or an internal electrical loopback mode.

Abstract translation: 通过片上确定BER来评估设备的性能的方法和系统可以包括在物理层设备（PLD）内部建立闭合通信路径。 基于PLD内生成的测试分组中通过封闭通信路径发送的测试分组中的比特数的比例以及测试分组中的发送比特数，可以从PLD内确定PLD的误码率， 由PLD通过封闭的通信路径接收。 PLD的发送路径可以内部耦合到PLD的接收路径，并且PLD的接收路径可以内部耦合到PLD的发送路径。 PLD可以内部配置为在内部光环回模式或内部电气环回模式下工作。

公开(公告)号：US20060107109A1

公开(公告)日：2006-05-18

申请号：US11262737

申请日：2005-11-01

Applicant: Osamu Ikabata

Inventor： Osamu Ikabata

IPC: G06F11/00

CPC classification number: H04L1/241 ,  H04L1/0061 ,  H04L1/243

Abstract: The present invention makes it possible to detect abnormality in an error detecting function early while minimizing adverse effects on transfer performance. The present invention provides a method for diagnosing a transfer data ensuring system in which a transmitting apparatus transmits transmission data provided with an error detection code and then receives a result of error detection (referred to as a transfer reply below) carried out by a receiving apparatus to verify the transferred data, the method comprising transmitting dedicated diagnosis data provided with an incorrect error detection code and diagnosis data provided with a correct error detection data and diagnosing the error verifying function on the basis of a transfer reply to the transmitted data.

Abstract translation: 本发明能够尽可能早地检测误差检测功能中的异常，同时最小化对传输性能的不利影响。 本发明提供了一种用于诊断传送数据确认系统的方法，其中发送装置发送提供有错误检测码的发送数据，然后接收由接收装置执行的错误检测结果（以下称为传送回复） 为了验证所传送的数据，该方法包括发送具有不正确的错误检测码的专用诊断数据和提供有正确的错误检测数据的诊断数据，并且基于对发送的数据的转移答复来诊断错误验证功能。

公开(公告)号：US20060072496A1

公开(公告)日：2006-04-06

申请号：US11002973

申请日：2004-12-03

Applicant: Masatoshi Nakamata ,  Benoist Sebire ,  Karri Ranta-Aho

Inventor： Masatoshi Nakamata ,  Benoist Sebire ,  Karri Ranta-Aho

IPC: H04Q7/00

CPC classification number: H04W36/02 ,  H04L1/1812 ,  H04L1/1838 ,  H04L1/1845 ,  H04L1/241

Abstract: A radio network element, including means for receiving data packets from a user equipment in a soft handover connection, means for determining whether the received data blocks have been received successfully or unsuccessfully, means for running a retransmission process for an un-successfully received data packet, and means for receiving control information instructing the size of memory to be reserved for retransmission processes of the connection.

Abstract translation: 一种无线网络元件，包括用于在软切换连接中从用户设备接收数据分组的装置，用于确定所接收的数据块是否已成功接收或未成功接收的装置，用于对未成功接收的数据分组进行重传过程的装置 以及用于接收控制信息的装置，该控制信息指示要为该连接的重传过程保留的存储器的大小。