公开(公告)号：US10340704B2

公开(公告)日：2019-07-02

申请号：US15404215

申请日：2017-01-12

Applicant: RichWave Technology Corp.

Inventor： Chih-Sheng Chen ,  Ching-Wen Hsu

IPC: H03K17/16 ,  H04B1/44 ,  H01P1/15 ,  H02J4/00 ,  H03K17/693

Abstract: A switch device includes a common terminal and a selection circuit. The selection circuit includes a primary switch, a first secondary switch, and a second secondary switch. The primary switch includes a plurality of primary transistors coupled in series and is coupled to the common terminal. The first secondary switch is coupled to the primary switch and a first transmission terminal. The first secondary switch includes a plurality of first secondary transistors coupled in series. The second secondary switch is coupled to the primary switch and a second transmission terminal. The second secondary switch includes a plurality of second secondary transistors coupled in series. The number of the first secondary transistors and the number of the second secondary transistors are both greater than or equal to the number of the primary transistors.

公开(公告)号：US10270244B2

公开(公告)日：2019-04-23

申请号：US15059251

申请日：2016-03-02

Applicant: RICHWAVE TECHNOLOGY CORP.

Inventor： Chuan-Chen Chao

IPC: H02H9/04 ,  H01L29/861 ,  H01L49/02 ,  H01L27/02 ,  H01L29/06 ,  H01L27/06 ,  H01L29/737

Abstract: An ESD protection circuit includes an input port, a resistor, a BJT, and a diode. The BJT has an emitter, a base, and a collector. The emitter of the BJT is coupled to the input port. The base of the BJT is coupled through the resistor to the input port. The diode has a first terminal and a second terminal. The first terminal of the diode is the collector of the BJT. The second terminal of the diode is coupled to a supply voltage.

公开(公告)号：US20190068137A1

公开(公告)日：2019-02-28

申请号：US15892361

申请日：2018-02-08

Applicant: RichWave Technology Corp.

Inventor： Yi-Fong Wang

IPC: H03F1/52 ,  H03F3/21 ,  H03F3/195 ,  H03F3/213

CPC classification number: H03F1/523 ,  H03F1/52 ,  H03F3/19 ,  H03F3/195 ,  H03F3/211 ,  H03F3/213 ,  H03F3/245 ,  H03F2200/105 ,  H03F2200/21 ,  H03F2200/408 ,  H03F2200/451 ,  H03F2200/462 ,  H03F2200/78

Abstract: A protection circuit for use in an RF active circuit includes a signal strength detecting circuit, a current detecting circuit, a logic circuit, and a switching unit. The signal strength detecting circuit is coupled to the signal input end or the signal output end of the RF active circuit and configured to generate a first detecting signal according to the signal strength of the RF signal. The current detecting circuit is configured to detect the VSWR of the RF signal based on the driving current of the RF active circuit, thereby generating a corresponding second detecting signal. The logic circuit is configured to generate a switch control signal according to the first detecting signal and the second detecting signal. The switching unit is configured to lower the driving current of the RF active circuit according to the switch control signal.

公开(公告)号：US10135393B2

公开(公告)日：2018-11-20

申请号：US15658409

申请日：2017-07-25

Applicant: RichWave Technology Corp.

Inventor： Hwey-Ching Chien

IPC: H03G3/20 ,  H03F1/02 ,  H03F3/04 ,  G01R19/00

Abstract: A signal detector includes a signal input terminal, N first resistors, (N−1) second resistors, a third resistor, M voltage-to-current units and a collection unit. A first terminal of a 1st first resistor is coupled to the signal input terminal. A first terminal of an ith first resistor is coupled to a second terminal of an (i−1)th first resistor. A first terminal of a kth second resistor is coupled to a second terminal of a kth first resistor. A second terminal of each second resistor is coupled to a reference voltage terminal. The third resistor is coupled between the reference voltage terminal and a second terminal of an Nth first resistor. Each voltage-to-current unit is coupled to a first terminal of a corresponding first resistor for converting a corresponding detection voltage to a detection current. The collection unit is coupled to the M voltage-to-current units for generating a detection signal according to at least the M detection currents.

公开(公告)号：US10103051B2

公开(公告)日：2018-10-16

申请号：US15603480

申请日：2017-05-24

Applicant: RichWave Technology Corp.

Inventor： Chih-Sheng Chen ,  Jhao-Yi Lin

IPC: H01L21/76 ,  H01L21/762 ,  H01L29/06 ,  H01L21/765 ,  H01L27/082 ,  H01L27/092 ,  H01L29/735

Abstract: A semiconductor structure includes a first well, a semiconductor element, a second well and a first isolation layer. The semiconductor element is formed on or contacts the first well. The first well is formed on the second well. The first isolation layer is used to reduce a parasitic effect between the first well and the second well. The bottom of the first isolation layer is at least as deep as the bottom of the first well. The first isolation layer substantially forms a first ring structure around the first well. The doping type of the second well is different from the doping type of the first well.

公开(公告)号：US20180076194A1

公开(公告)日：2018-03-15

申请号：US15638351

申请日：2017-06-29

Applicant: RichWave Technology Corp.

Inventor： Chih-Sheng Chen ,  Tsung-Han Lee ,  Chang-Yi Chen

IPC: H01L27/06

CPC classification number: H01L27/0629 ,  H01L29/7833

Abstract: A transistor includes a first doping well, a second doping well, a first doping area, a second doping area, a gate layer, and at least one compensation capacitor. The first doping well and the second doping well are formed in a structure layer. The first doping area and the second doping area are formed in the first doping well and have a first conductivity type, the second doping well has a second conductivity type, and the first doping area is used for transmitting the signal. The at least one compensation capacitor is used for adjusting a voltage drop of a parasitic junction capacitor between the first doping area and the first doping well, a voltage drop of a parasitic junction capacitor between the first doping well and the second doping well, or a voltage drop of a parasitic junction capacitor between the second doping well and the structure layer.

公开(公告)号：US20180025935A1

公开(公告)日：2018-01-25

申请号：US15603480

申请日：2017-05-24

Applicant: RichWave Technology Corp.

Inventor： Chih-Sheng Chen ,  Jhao-Yi Lin

IPC: H01L21/762 ,  H01L29/06

CPC classification number: H01L21/76224 ,  H01L21/765 ,  H01L27/082 ,  H01L27/0928 ,  H01L29/0619 ,  H01L29/735

Abstract: A semiconductor structure includes a first well, a semiconductor element, a second well and a first isolation layer. The semiconductor element is formed on or contacts the first well. The first well is formed on the second well. The first isolation layer is used to reduce a parasitic effect between the first well and the second well. The bottom of the first isolation layer is at least as deep as the bottom of the first well. The first isolation layer substantially forms a first ring structure around the first well. The doping type of the second well is different from the doping type of the first well.

公开(公告)号：US20170353189A1

公开(公告)日：2017-12-07

申请号：US15173723

申请日：2016-06-06

Applicant: RichWave Technology Corp.

Inventor： Tse-Peng Chen

IPC: H03L7/06

CPC classification number: H03L7/06 ,  G01S13/56 ,  H03L7/087 ,  H03L7/091 ,  H03L7/093 ,  H03L7/24

Abstract: A subsampling motion detector configured to detect motion information of an object under measurement receives a first wireless radio frequency (RF) signal and transmits a second wireless RF signal, the first wireless RF signal being generated by reflecting the second wireless RF signal from the object. The subsampling motion detector includes a controllable oscillator outputting an oscillation signal, wherein the first wireless RF signal is injected to the controllable oscillator for controlling the controllable oscillator through injecting locking. The subsampling motion detector further including a subsampling phase detector (SSPD) generating a control signal according to the oscillation signal generated by the controllable oscillator and a reference frequency, the SSPD outputting the control signal to the controllable oscillator for controlling the controllable oscillator, the oscillation signal of the controllable oscillator being locked to a multiple of the reference frequency and the control signal representing the motion information of the object.

公开(公告)号：USRE46540E1

公开(公告)日：2017-09-05

申请号：US14464441

申请日：2014-08-20

Applicant: RICHWAVE TECHNOLOGY CORP.

Inventor： Yu-Ling Chiu ,  Tsyr-Shyang Liou

IPC: H04B1/28 ,  H01L21/00 ,  H04B1/46 ,  H04B1/38

CPC classification number: H04B1/38 ,  H01L2224/48145 ,  H01L2224/48247 ,  H01L2924/181 ,  H01L2924/00012

Abstract: A method and an apparatus for integrating a surface acoustic wave (SAW) filter and a transceiver are provided to solve the problem of having a large area of the prior-art integration of a SAW filter and a transceiver; wherein a device for integrating a SAW filter and a transceiver is provided and a component stack method is used to accomplish the integration of the SAW filter and the transceiver, and thus besides featuring a low cost and a small area as well as avoiding a signal loss, the invention can further include a design of encapsulating other components and chips, or even suitable to be used for various integrated circuit packaging technologies (such as QFP and BGA, etc.)

公开(公告)号：US20170131391A1

公开(公告)日：2017-05-11

申请号：US15415832

申请日：2017-01-25

Applicant: RichWave Technology Corp.

Inventor： Tse-Peng Chen

IPC: G01S11/10

CPC classification number: G01S11/10 ,  G01S7/034 ,  G01S7/35 ,  G01S13/536 ,  H03B19/14 ,  H03B2200/0074 ,  H03B2200/0082 ,  H03B2200/0088 ,  H03L7/0802 ,  H03L7/099 ,  H04L1/0053

Abstract: A detector includes a frequency multiplier and a transceiving node. The frequency multiplier includes a first terminal, a second terminal and an output terminal. The first terminal is used to receive a first injection signal having a first frequency. The output terminal is used to output an output signal. The second terminal is used to receive a second injection signal having a second frequency. The frequency multiplier is used to output the output signal at a frequency substantially equal to a multiple of the first frequency by injection locking and pull the output signal to the second frequency by injection pulling. The transceiving node is coupled to the output terminal and the second terminal of the frequency multiplier. The transceiving node is used to transmit the output signal, and receive a received signal having a third frequency. The received signal is used to update the second injection signal.