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公开(公告)号：US10963986B2
公开(公告)日：2021-03-30
申请号：US16727073
申请日：2019-12-26
Applicant: INTEL CORPORATION
Inventor： Balaji Vembu , Josh B. Mastronarde , Altug Koker , Nikos Kaburlasos , Abhishek R. Appu , Joydeep Ray
Abstract: Methods and apparatus relating to techniques for power management. In an example, an apparatus comprises logic, at least partially comprising hardware logic, to receive one or more frames for a workload, determine one or more compute resource parameters for the workload, and store the one or more compute resource parameters for the workload in a memory in association with workload context data for the workload. Other embodiments are also disclosed and claimed.
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公开(公告)号：US10956223B2
公开(公告)日：2021-03-23
申请号：US16905203
申请日：2020-06-18
Applicant: INTEL CORPORATION
Inventor： Altug Koker , Abhishek R. Appu , Kiran C. Veernapu , Joydeep Ray , Balaji Vembu
Abstract: Methods and apparatus relating to techniques for avoiding cache lookup for cold cache. In an example, an apparatus comprises logic, at least partially comprising hardware logic, to receive a completion acknowledgment from the plurality of graphics processing units and in response to a determination that the workload is finished, to terminate one or more communication connections on the interconnect bridge. Other embodiments are also disclosed and claimed.
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公开(公告)号：US10943379B2
公开(公告)日：2021-03-09
申请号：US16533920
申请日：2019-08-07
Applicant: Intel Corporation
Inventor： Deepak S. Vembar , Atsuo Kuwahara , Chandrasekaran Sakthivel , Radhakrishnan Venkataraman , Brent E. Insko , Anupreet S. Kalra , Hugues Labbe , Abhishek R. Appu , Ankur N. Shah , Joydeep Ray , ElMoustapha Ould-Ahmed-Vall , James M. Holland
IPC: G09G5/00 , G06T11/60 , G06T9/00 , H04N19/124 , H04N19/167 , H04N19/17 , H04N19/436 , H04N19/503
Abstract: An embodiment of a graphics apparatus may include a focus identifier to identify a focus area, and a color compressor to selectively compress color data based on the identified focus area. Another embodiment of a graphics apparatus may include a motion detector to detect motion of a real object, a motion predictor to predict a motion of the real object, and an object placer to place a virtual object relative to the real object based on the predicted motion of the real object. Another embodiment of a graphics apparatus may include a frame divider to divide a frame into viewports, a viewport prioritizer to prioritize the viewports, a renderer to render a viewport of the frame in order in accordance with the viewport priorities, and a viewport transmitter to transmit a completed rendered viewport. Other embodiments are disclosed and claimed.
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公开(公告)号：US10942740B2
公开(公告)日：2021-03-09
申请号：US16794973
申请日：2020-02-19
Applicant: Intel Corporation
Inventor： Altug Koker , Michael Apodaca , Kai Xiao , Chandrasekaran Sakthivel , Jeffery S. Boles , Adam T. Lake , Abhishek R. Appu
Abstract: Systems, apparatuses and methods may provide for technology that activates a first context on a graphics processor and detects a context switch condition with respect to the first context. Additionally, a second context may be activated, in response to the context switch condition, on the graphics processor while the first context is active on the graphics processor. In one example, activating the second context includes adding a group identifier to a plurality of threads corresponding to the second context and launching the plurality of threads with the group identifier on the graphics processor.
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公开(公告)号：US20210056056A1
公开(公告)日：2021-02-25
申请号：US17011745
申请日：2020-09-03
Applicant: Intel Corporation
Inventor： Altug Koker , Joydeep Ray , Vasanth Ranganathan , Abhishek R. Appu
Abstract: An apparatus to facilitate source synchronous signaling is disclosed. The apparatus includes transfer protocol logic to provide for source synchronous transfer of data within an interconnect fabric, including one or more synchronizers having logic to a transmit data signal and a source clock (clk) signal during the transfer of data.
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Patent Agency Ranking
公开(公告)号：US20210055930A1
公开(公告)日：2021-02-25
申请号：US17073744
申请日：2020-10-19
Applicant: Intel Corporation
Inventor： Abhishek R. Appu , Altug Koker , Joydeep Ray , Ramkumar Ravikumar , Kiran C. Veernapu , Prasoonkumar Surti , Vasanth Ranganathan
Abstract: In an example, an apparatus comprises a plurality of execution units, and logic, at least partially including hardware logic, to assemble a general register file (GRF) message and hold the GRF message in storage in a data port until all data for the GRF message is received. Other embodiments are also disclosed and claimed.
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公开(公告)号：US10929947B2
公开(公告)日：2021-02-23
申请号：US16572161
申请日：2019-09-16
Applicant: Intel Corporation
Inventor： Joydeep Ray , Ankur N. Shah , Abhishek R. Appu , Deepak S. Vembar , ElMoustapha Ould-Ahmed-Vall , Atsuo Kuwahara , Travis T. Schluessler , Linda L. Hurd , Josh B. Mastronarde , Vasanth Ranganathan
Abstract: An embodiment of a graphics apparatus may include a context engine to determine contextual information, a recommendation engine communicatively coupled to the context engine to determine a recommendation based on the contextual information, and a configuration engine communicatively coupled to the recommendation engine to adjust a configuration of a graphics operation based on the recommendation. Other embodiments are disclosed and claimed.
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公开(公告)号：US10922227B2
公开(公告)日：2021-02-16
申请号：US16114593
申请日：2018-08-28
Applicant: Intel Corporation
Inventor： Altug Koker , Louis Feng , Tomasz Janczak , Andrew T. Lauritzen , David M Cimini , Abhishek R. Appu
IPC: G06F12/08 , G06F12/0808 , G06F9/38 , G06T1/20 , G06F12/0815 , G06F12/0891 , G06F12/0811 , G06F12/0831 , G06F12/0897
Abstract: Systems, apparatuses and methods may provide for technology that detects, by a current stage of a hardware pipeline, a flush request with respect to a first resource and executes, by the current stage, one or more transactions associated with a second resource. Additionally, the current stage may conduct one or more flush operations with respect to the first resource, wherein the one or more transactions associated with the second resource are executed after detection of the flush request and before the one or more flush operations.
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公开(公告)号：US20210035270A1
公开(公告)日：2021-02-04
申请号：US16929787
申请日：2020-07-15
Applicant: Intel Corporation
Inventor： Tomer Bar-On , Hugues Labbe , Adam T. Lake , Kai Xiao , Ankur N. Shah , Johannes Guenther , Abhishek R. Appu , Joydeep Ray , Deepak S. Vembar , ElMoustapha Ould-Ahmed-Vall
Abstract: Systems, apparatuses and methods may provide for technology that identifies, at an image post-processor, unresolved surface data and identifies, at the image post-processor, control data associated with the unresolved surface data. Additionally, the technology may resolve, at the image post-processor, the unresolved surface data and the control data into a final image.
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公开(公告)号：US20210034540A1
公开(公告)日：2021-02-04
申请号：US17013237
申请日：2020-09-04
Applicant: Intel Corporation
Inventor： Abhishek R. Appu , Altug Koker , Joydeep Ray , Prasoonkumar Surti , Kamal Sinha , Kiran C. Veernapu , Balaji Vembu
IPC: G06F12/0888 , G06F13/42 , G06F13/40 , G06T1/60 , G06F12/0895 , G06T1/20
Abstract: Methods and apparatus relating to techniques for avoiding cache lookup for cold cache. In an example, an apparatus comprises logic, at least partially comprising hardware logic, to receive, in a read/modify/write (RMW) pipeline, a cache access request from a requestor, wherein the cache request comprises a cache set identifier associated with requested data in the cache set, determine whether the cache set associated with the cache set identifier is in an inaccessible invalid state, and in response to a determination that the cache set is in an inaccessible state or an invalid state, to terminate the cache access request. Other embodiments are also disclosed and claimed.
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