Abstract:
A high linearity phase interpolator (PI) is disclosed. A phase value parameter indicative of a desired phase difference between an output signal and an input clock signal edge may be provided by control logic. A first capacitor may be charged for a first period of time with a first current that is proportional to the phase value parameter to produce a first voltage on the capacitor that is proportional to the phase value parameter. The first capacitor may be further charged for a second period of time with a second current that has a constant value to form a voltage ramp offset by the first voltage. A reference voltage may be compared to the voltage ramp during the second period of time. The output signal may be asserted at a time when the voltage ramp equals the reference voltage.
Abstract:
A metallic waveguide is mounted on a multilayer substrate. The metallic waveguide has an open end formed by a top, bottom and sides configured to receive a core member of a dielectric waveguide, and an opposite tapered end formed by declining the top of the metallic waveguide past the bottom of the metallic waveguide and down to contact the multilayer substrate. A pinnacle of the tapered end is coupled to the ground plane element, and the bottom side of the metallic waveguide is in contact with the multiplayer substrate and coupled to the microstrip line.
Abstract:
An electronic device has a multilayer substrate that has an interface surface configured for interfacing to a dielectric waveguide. A conductive layer on the substrate is etched to form a dipole antenna disposed adjacent the interface surface to provide coupling to the dielectric waveguide. A reflector structure is formed in the substrate adjacent the dipole antenna opposite from the interface surface.
Abstract:
At least one tone is generated. An output signal is generated in response to an input signal and the at least one tone. The output signal is modulated. The input signal and the at least one tone are represented in the modulated output signal. The at least one tone is outside a bandwidth of the input signal as represented in the modulated output signal. The modulated output signal is amplified. The at least one tone in the amplified signal is attenuated after the amplifying.
Abstract:
An outphasing amplifier includes a first class-E power amplifier (16-1) having an output coupled to a first conductor (31-1) and an input receiving a first RF drive signal (S1(t)). A first reactive element (CA-1) is coupled between the first conductor and a second conductor (30-1). A second reactive element (LA-1) is coupled between the second conductor and a third conductor (32-1). A second class-E power amplifier (17-1) includes an output coupled to a fourth conductor (31-2) and an input coupled to a second RF drive signal (S2(t)), a third reactive element (CA-3) coupled between the second and fourth conductors. Outputs of the first and second power amplifiers are combined by the first, second and third reactive elements to produce an output current in a load (R). An efficiency enhancement circuit (LEEC-1) is coupled between the first and fourth conductors to improve power efficiency at back-off power levels. Power enhancement circuits (20-1,2) are coupled to the first and fourth conductors, respectively.
Abstract:
A rotatable coupler for dielectric wave guides is described. A first dielectric wave guide (DWG) has an interface surface at a one end of the DWG. A second DWG has a matching interface surface at an end of the second DWG. A rotatable coupling mechanism is coupled to the two DWG ends and is configured to hold the interface surface of the first DWG in axial alignment with the interface surface of the second DWG while allowing the interface surface of the first DWG to rotate axially with respect to the interface surface of the second DWG.
Abstract:
A dielectric waveguide (DWG) has a dielectric core member that has a length L and an oblong cross section. The core member has a first dielectric constant value. A dielectric cladding surrounds the dielectric core member; the cladding has a second dielectric constant value that is lower than the first dielectric constant. A conductive shield layer surrounds a portion of the dielectric cladding.
Abstract:
An electronic device has a multilayer substrate that has an interface surface configured for interfacing to a dielectric waveguide. A conductive layer on the substrate is etched to form a dipole antenna disposed adjacent the interface surface to provide coupling to the dielectric waveguide. A reflector structure is formed in the substrate adjacent the dipole antenna opposite from the interface surface.
Abstract:
An apparatus is provided. A differential pair of transistors is configured to receive a first differential signal having a first frequency, and a transformer, having a primary side and a secondary side is provided. The primary side of the transformer is coupled to the differential pair of transistors, and the secondary side of the transformer is configured to output a second differential signal having a second frequency, where the second frequency is greater than the first frequency. A first transistor is coupled to the first supply rail, the primary side of the transformer, and the differential pair of transistors, where the first transistor is of a first conduction type. A second transistor is coupled to the second supply rail, the primary side of the transformer, and the differential pair of transistors, where the second transistor is of a second conduction type.
Abstract:
An apparatus is provided. A differential pair of transistors is configured to receive a first differential signal having a first frequency, and a transformer, having a primary side and a secondary side is provided. The primary side of the transformer is coupled to the differential pair of transistors, and the secondary side of the transformer is configured to output a second differential signal having a second frequency, where the second frequency is greater than the first frequency. A first transistor is coupled to the first supply rail, the primary side of the transformer, and the differential pair of transistors, where the first transistor is of a first conduction type. A second transistor is coupled to the second supply rail, the primary side of the transformer, and the differential pair of transistors, where the second transistor is of a second conduction type.