High Linearity Phase Interpolator
    81.
    发明申请

    公开(公告)号:US20180131378A1

    公开(公告)日:2018-05-10

    申请号:US15346524

    申请日:2016-11-08

    CPC classification number: H03L7/16 H03K23/00

    Abstract: A high linearity phase interpolator (PI) is disclosed. A phase value parameter indicative of a desired phase difference between an output signal and an input clock signal edge may be provided by control logic. A first capacitor may be charged for a first period of time with a first current that is proportional to the phase value parameter to produce a first voltage on the capacitor that is proportional to the phase value parameter. The first capacitor may be further charged for a second period of time with a second current that has a constant value to form a voltage ramp offset by the first voltage. A reference voltage may be compared to the voltage ramp during the second period of time. The output signal may be asserted at a time when the voltage ramp equals the reference voltage.

    CLASS-E OUTPHASING POWER AMPLIFIER WITH EFFICIENCY AND OUTPUT POWER ENHANCEMENT CIRCUITS AND METHOD
    85.
    发明申请
    CLASS-E OUTPHASING POWER AMPLIFIER WITH EFFICIENCY AND OUTPUT POWER ENHANCEMENT CIRCUITS AND METHOD 有权
    具有效率和输出功率增强电路和方法的CLASS-E输出功率放大器

    公开(公告)号:US20150372645A1

    公开(公告)日:2015-12-24

    申请号:US14312239

    申请日:2014-06-23

    Abstract: An outphasing amplifier includes a first class-E power amplifier (16-1) having an output coupled to a first conductor (31-1) and an input receiving a first RF drive signal (S1(t)). A first reactive element (CA-1) is coupled between the first conductor and a second conductor (30-1). A second reactive element (LA-1) is coupled between the second conductor and a third conductor (32-1). A second class-E power amplifier (17-1) includes an output coupled to a fourth conductor (31-2) and an input coupled to a second RF drive signal (S2(t)), a third reactive element (CA-3) coupled between the second and fourth conductors. Outputs of the first and second power amplifiers are combined by the first, second and third reactive elements to produce an output current in a load (R). An efficiency enhancement circuit (LEEC-1) is coupled between the first and fourth conductors to improve power efficiency at back-off power levels. Power enhancement circuits (20-1,2) are coupled to the first and fourth conductors, respectively.

    Abstract translation: 外相放大器包括具有耦合到第一导体(31-1)的输出的第一E类功率放大器(16-1)和接收第一RF驱动信号(S1(t))的输入。 第一电抗元件(CA-1)耦合在第一导体和第二导体(30-1)之间。 第二电抗元件(LA-1)耦合在第二导体和第三导体(32-1)之间。 第二类E功率放大器(17-1)包括耦合到第四导体(31-2)的输出和耦合到第二RF驱动信号(S2(t))的输入,第三反应元件(CA-3 )耦合在第二和第四导体之间。 第一和第二功率放大器的输出由第一,第二和第三无功元件组合以在负载(R)中产生输出电流。 效率增强电路(LEEC-1)耦合在第一和第四导体之间,以提高退避功率电平的功率效率。 功率增强电路(20-1,2)分别耦合到第一和第四导体。

    Dielectric Waveguide with Conductive Coating
    87.
    发明申请
    Dielectric Waveguide with Conductive Coating 有权
    导电涂层介质波导

    公开(公告)号:US20140368301A1

    公开(公告)日:2014-12-18

    申请号:US14285616

    申请日:2014-05-22

    CPC classification number: H01P3/16 H01P3/122

    Abstract: A dielectric waveguide (DWG) has a dielectric core member that has a length L and an oblong cross section. The core member has a first dielectric constant value. A dielectric cladding surrounds the dielectric core member; the cladding has a second dielectric constant value that is lower than the first dielectric constant. A conductive shield layer surrounds a portion of the dielectric cladding.

    Abstract translation: 电介质波导(DWG)具有长度L和长方形横截面的电介质芯构件。 芯构件具有第一介电常数值。 电介质包层围绕介电芯构件; 所述包层具有低于所述第一介电常数的第二介电常数值。 导电屏蔽层围绕电介质包层的一部分。

    FREQUENCY MULTIPLIER
    89.
    发明申请
    FREQUENCY MULTIPLIER 有权
    频率乘法器

    公开(公告)号:US20140198550A1

    公开(公告)日:2014-07-17

    申请号:US13741010

    申请日:2013-01-14

    CPC classification number: H02M5/16 H02M5/297 H03B19/14

    Abstract: An apparatus is provided. A differential pair of transistors is configured to receive a first differential signal having a first frequency, and a transformer, having a primary side and a secondary side is provided. The primary side of the transformer is coupled to the differential pair of transistors, and the secondary side of the transformer is configured to output a second differential signal having a second frequency, where the second frequency is greater than the first frequency. A first transistor is coupled to the first supply rail, the primary side of the transformer, and the differential pair of transistors, where the first transistor is of a first conduction type. A second transistor is coupled to the second supply rail, the primary side of the transformer, and the differential pair of transistors, where the second transistor is of a second conduction type.

    Abstract translation: 提供了一种装置。 差分对晶体管被配置为接收具有第一频率的第一差分信号,并且提供具有初级侧和次级侧的变压器。 变压器的初级侧耦合到差分对晶体管,并且变压器的次级侧被配置为输出具有第二频率的第二差分信号,其中第二频率大于第一频率。 第一晶体管耦合到第一电源轨,变压器的初级侧和差分对晶体管,其中第一晶体管是第一导电类型。 第二晶体管耦合到第二电源轨,变压器的初级侧和差分对晶体管,其中第二晶体管是第二导电类型。

    Frequency multiplier
    90.
    发明授权
    Frequency multiplier 有权
    倍频器

    公开(公告)号:US08760899B1

    公开(公告)日:2014-06-24

    申请号:US13741010

    申请日:2013-01-14

    CPC classification number: H02M5/16 H02M5/297 H03B19/14

    Abstract: An apparatus is provided. A differential pair of transistors is configured to receive a first differential signal having a first frequency, and a transformer, having a primary side and a secondary side is provided. The primary side of the transformer is coupled to the differential pair of transistors, and the secondary side of the transformer is configured to output a second differential signal having a second frequency, where the second frequency is greater than the first frequency. A first transistor is coupled to the first supply rail, the primary side of the transformer, and the differential pair of transistors, where the first transistor is of a first conduction type. A second transistor is coupled to the second supply rail, the primary side of the transformer, and the differential pair of transistors, where the second transistor is of a second conduction type.

    Abstract translation: 提供了一种装置。 差分对晶体管被配置为接收具有第一频率的第一差分信号,并且提供具有初级侧和次级侧的变压器。 变压器的初级侧耦合到差分对晶体管,并且变压器的次级侧被配置为输出具有第二频率的第二差分信号,其中第二频率大于第一频率。 第一晶体管耦合到第一电源轨,变压器的初级侧和差分对晶体管,其中第一晶体管是第一导电类型。 第二晶体管耦合到第二电源轨,变压器的初级侧和差分对晶体管,其中第二晶体管是第二导电类型。

Patent Agency Ranking