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公开(公告)号：JP2008211792A
公开(公告)日：2008-09-11
申请号：JP2008039903
申请日：2008-02-21
Applicant: Stmicroelectronics Asia Pacific Pte Ltd , エスティーマイクロエレクトロニクス アジア パシフィック ピーティーイー リミテッドSTMicroelectronics Asia Pacific Pte Ltd
Inventor： GUEDON YANNICK , DARMAWAN YOSEPH ADHI
IPC: H03K17/687 , H03M1/66
Abstract: PROBLEM TO BE SOLVED: To provide an improved digital to analog converter circuit of an LCD panel column driver. SOLUTION: The digital to analog converter (DAC) circuit operates over an upper range and a lower range. An upper voltage node is designated AVDD; a middle voltage node is designated HVDD; and a lower voltage node designated ground. An upper DAC stage has at least one NMOS transistors that produces an output to an upper range output node when the output is in the upper range. A lower DAC stage has at least one PMOS transistors that produces an output to a lower range output node when the output is in the lower range. A body bias control circuit couples the body of the upper NMOS transistor to a voltage source equal to HVDD-Vbe and connects the body of the lower PMOS transistor to voltage source equal to HVDD+Vbe. COPYRIGHT: (C)2008,JPO&INPIT
Abstract translation: 要解决的问题：提供一种改进的LCD面板列驱动器的数模转换器电路。
解决方案：数模转换器（DAC）电路在上限和下限范围内工作。 上电压节点被指定为AVDD; 中间电压节点被指定为HVDD; 和一个较低的电压节点指定为地。 上DAC DAC具有至少一个NMOS晶体管，当输出处于上限范围时，该晶体管产生输出到较高范围输出节点。 较低的DAC级具有至少一个PMOS晶体管，当输出处于较低范围时，其产生输出到较低范围输出节点。 体偏置控制电路将上NMOS晶体管的主体耦合到等于HVDD-Vbe的电压源，并将下PMOS晶体管的主体连接到等于HVDD + Vbe的电压源。 版权所有（C）2008，JPO＆INPIT
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公开(公告)号：JP2006203906A
公开(公告)日：2006-08-03
申请号：JP2006012868
申请日：2006-01-20
Applicant: Stmicroelectronics Asia Pacific Pte Ltd , エスティーマイクロエレクトロニクス アジア パシフィック ピーティーイー リミテッドSTMicroelectronics Asia Pacific Pte Ltd
Inventor： WU YUAN , GEORGE SAPNA
CPC classification number: H04S3/002
Abstract: PROBLEM TO BE SOLVED: To solve a problem of stereo sound playback in at least 5.1 speakers system and resolve scalability issues in standpoints of calculation and memory use. SOLUTION: The invention adopts a multi-band processing to allow to handle different frequency bands separately. This achieves better channel separation when more than one dominant signals exist in an arbitrary time. Since chances in which a dominant band falls into different frequency bands as the number of the frequency bands increases, uncertainness in decoding decreases. A problem of a plurality of dominant signals is decreased by implementing slow attenuation of surround signal when one dominant central signal exists and vice versa. This is based on an assumption that not all dominant signals are always active. COPYRIGHT: (C)2006,JPO&NCIPI
Abstract translation: 要解决的问题：解决至少5.1扬声器系统中的立体声播放问题，并解决计算和存储使用的观点的可扩展性问题。 解决方案：本发明采用多频带处理，分别处理不同的频带。 当在任意时间内存在多个主导信号时，这实现了更好的信道分离。 由于随着频带数的增加，主频带落入不同的频带，因此解码的不确定性降低。 当存在一个主要中心信号时，通过实施环绕信号的缓慢衰减来减少多个主要信号的问题，反之亦然。 这是基于一个假设，并不是所有的主要信号总是活跃的。 版权所有（C）2006，JPO＆NCIPI
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公开(公告)号：JP5456261B2
公开(公告)日：2014-03-26
申请号：JP2008039903
申请日：2008-02-21
Inventor： ゲドン ヤニク , アディ ダーマワン ヨセフ
IPC: H03K17/10 , H03K17/687 , H03M1/66
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公开(公告)号：WO2012174169A2
公开(公告)日：2012-12-20
申请号：PCT/US2012/042325
申请日：2012-06-13
Applicant: NEO, TeckKhim , MIKULAN, Paul, I. , ROBINSON, Murray J. , ROSS, Rube M. , STMicroelectronics Asia Pacific Pte. Ltd. (Singapore) , STMicroelectronics, Inc.
Inventor： NEO, TeckKhim , MIKULAN, Paul, I. , ROBINSON, Murray J. , ROSS, Rube M.
CPC classification number: G06F21/73 , G06F21/44 , H04L9/3278
Abstract: In an embodiment, to deter or delay counterfeiting/cloning of a replacement component of a host device, the replacement component is provided with a code value. The code value is generated from a value of at least one physical parameter of the replacement component and is stored on the replacement component. The host device determines whether the replacement component is authentic if the stored code value matches a reference code value.
Abstract translation: 在一个实施例中，为了阻止或延迟伪装/克隆主机设备的替换部件，替换部件被提供有代码值。 代码值是从替换组件的至少一个物理参数的值生成的，并存储在替换组件上。 如果存储的代码值与参考代码值匹配，则主机设备确定替换组件是否可信。
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公开(公告)号：EP3989397B1
公开(公告)日：2025-04-30
申请号：EP21198160.0
申请日：2021-09-22
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Patent Agency Ranking
公开(公告)号：EP4297260B1
公开(公告)日：2025-01-22
申请号：EP23208147.1
申请日：2023-02-22
Inventor： GUEDON, Yannick , LEE, Teerasak
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7.发明公开
公开(公告)号：EP3591967A1
公开(公告)日：2020-01-08
申请号：EP19184337.4
申请日：2019-07-04
Inventor： CHUA, Lookah , DUEY, Jansen Reyes , LULE, Tarek , THIVIN, Mathieu
Abstract: An electronic device includes an array of image pixels, with the array of image pixels having inputs coupled to control lines and outputs coupled to output lines, and at least one array of dummy pixels, with the at least one array of dummy pixels having inputs coupled to the control lines. Each dummy pixel of the at least one array of dummy pixels is configured to provide a certain output signal in an absence of a fault with at least one of the control lines or of a fault with at least one of the output lines, such that a lack of output of the certain output signal by one or more of the dummy pixels of the at least one array of dummy pixels indicates the fault.
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公开(公告)号：EP1313230B1
公开(公告)日：2016-01-20
申请号：EP02025742.4
申请日：2002-11-15
Inventor： Sathiavageeswaran, Karthik , Aldridge, Chris , Iqbal, Mohamed Imtiyaz
IPC: H04B1/707
CPC classification number: H04B1/7117 , H04B2201/70707
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公开(公告)号：EP1456926B1
公开(公告)日：2013-03-27
申请号：EP01275032.9
申请日：2001-12-14
Applicant: STMicroelectronics Asia Pacific Pte Ltd.
Inventor： RANA, Sakti, Pada
IPC: H02H9/04
CPC classification number: H02H9/041 , H02H7/1227
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10.发明授权Yule walker based low-complexity voice activity detector in noise suppression systems 有权上尤拉 - 沃克beruhender方程低复杂性的语音活动检测器在降噪系统
公开(公告)号：EP1887559B1
公开(公告)日：2013-03-13
申请号：EP07253153.6
申请日：2007-08-10
Applicant: STMicroelectronics Asia Pacific Pte Ltd.
Inventor： Muralidhar, Karthik , Krishna, Anoop Kumar
IPC: G10L25/78
CPC classification number: G10L25/87
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