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    METHODS AND SYSTEMS FOR DYNAMICALLY CONTROLLING OPERATIONS IN A NON-VOLATILE MEMORY TO LIMIT POWER CONSUMPTION
    2.
    发明申请
    METHODS AND SYSTEMS FOR DYNAMICALLY CONTROLLING OPERATIONS IN A NON-VOLATILE MEMORY TO LIMIT POWER CONSUMPTION 审中-公开
    用于动态地控制非易失性存储器中的操作以限制功耗的方法和系统

    公开(公告)号：WO2012015793A1

    公开(公告)日：2012-02-02

    申请号：PCT/US2011/045310

    申请日：2011-07-26

    Applicant: APPLE INC. ,  BYOM, Matthew ,  KHMELNITSKY, Vadim ,  FIENNES, Hugo ,  KAPOOR, Arjun

    Inventor： BYOM, Matthew ,  KHMELNITSKY, Vadim ,  FIENNES, Hugo ,  KAPOOR, Arjun

    IPC: G06F1/32 ,  G06F9/50 ,  G06F3/06

    CPC classification number: G06F1/3225 ,  G06F1/3275 ,  G06F1/329 ,  G06F3/0625 ,  G06F3/0659 ,  G06F3/0679 ,  G06F9/5094 ,  G11C16/30 ,  Y02D10/14 ,  Y02D10/154 ,  Y02D10/22 ,  Y02D10/24

    Abstract: Systems and methods are disclosed for limiting power consumption of a non-volatile memory (NVM) using a power limiting scheme that distributes a number of concurrent NVM operations over time. This provides a "current consumption cap" that fixes an upper limit of current consumption for the NVM, thereby eliminating peak power events. In one embodiment, power consumption of a NVM can be limited by receiving data suitable for use as a factor in adjusting a current threshold from at least one of a plurality of system sources. The current threshold can be less than a peak current capable of being consumed by the NVM and can be adjusted based on the received data. A power limiting scheme can be used that limits the number of concurrent NVM operations performed so that a cumulative current consumption of the NVM does not exceed the adjusted current threshold.

    Abstract translation: 公开了用于使用分配多个并发NVM操作随时间推移的功率限制方案来限制非易失性存储器（NVM）的功率消耗的系统和方法。 这提供了一个“电流消耗上限”，用于确定NVM的电流消耗上限，从而消除峰值功率事件。 在一个实施例中，可以通过接收适合用作从多个系统源中的至少一个调整当前阈值的因素的数据来限制NVM的功耗。 当前阈值可以小于能够被NVM消耗的峰值电流，并且可以基于所接收的数据进行调整。 可以使用功率限制方案，其限制执行的并行NVM操作的数量，使得NVM的累积电流消耗不超过调整的电流阈值。

    CONTROLLING AND STAGGERING OPERATIONS TO LIMIT CURRENT SPIKES
    5.
    发明申请
    CONTROLLING AND STAGGERING OPERATIONS TO LIMIT CURRENT SPIKES 审中-公开
    控制和拖延操作以限制当前尖峰

    公开(公告)号：WO2011085357A3

    公开(公告)日：2011-09-01

    申请号：PCT/US2011020801

    申请日：2011-01-11

    Applicant: APPLE INC ,  WAKRAT NIR J ,  POST DANIEL J ,  HERMAN KENNETH ,  KHMELNITSKY VADIM ,  SEROFF NICK ,  THIO HSIAO ,  BYOM MATTHEW

    Inventor： WAKRAT NIR J ,  POST DANIEL J ,  HERMAN KENNETH ,  KHMELNITSKY VADIM ,  SEROFF NICK ,  THIO HSIAO ,  BYOM MATTHEW

    IPC: G06F1/26 ,  G06F1/32

    CPC classification number: G11C16/30 ,  G06F1/26 ,  G06F1/3203

    Abstract: Systems and methods are disclosed for managing the peak power consumption of a system, such as a non-volatile memory system (e.g., flash memory system). The system can include multiple subsystems and a controller for controlling the subsystems. Each subsystem may have a current profile that is peaky. Thus, the controller may control the peak power of the system by, for example, limiting the number of subsystems that can perform power-intensive operations at the same time or by aiding a subsystem in determining the peak power that the subsystem may consume at any given time.

    Abstract translation: 公开了用于管理诸如非易失性存储器系统（例如，闪存系统）的系统的峰值功耗的系统和方法。 该系统可以包括多个子系统和一个用于控制子系统的控制器。 每个子系统可能具有峰值的当前配置文件。 因此，控制器可以通过例如限制可以同时执行功率密集型操作的子系统的数量或者通过帮助子系统确定子系统在任何时候消耗的峰值功率来控制系统的峰值功率 给定的时间。

    HANDLING ERRORS DURING DEVICE BOOTUP FROM A NON-VOLATILE MEMORY
    7.
    发明申请
    HANDLING ERRORS DURING DEVICE BOOTUP FROM A NON-VOLATILE MEMORY 审中-公开
    在非易失性存储器的设备引导期间处理错误

    公开(公告)号：WO2012030547A1

    公开(公告)日：2012-03-08

    申请号：PCT/US2011/048223

    申请日：2011-08-18

    Applicant: APPLE INC. ,  BYOM, Matthew ,  HERMAN, Kenneth ,  WAKRAT, Nir, J. ,  POST, Daniel, J.

    Inventor： BYOM, Matthew ,  HERMAN, Kenneth ,  WAKRAT, Nir, J. ,  POST, Daniel, J.

    IPC: G06F11/07

    CPC classification number: G06F11/0793 ,  G06F11/0721 ,  G06F11/0787 ,  G06F11/1433

    Abstract: Systems and methods are provided for handling errors during device bootup from a non-volatile memory ("NVM"). A NVM interface of an electronic device can be configured to detect errors and maintain an error log in volatile memory while the device is being booted up. Once device bootup has completed, a NVM driver of the electronic device can be configured to correct the detected errors using the error log. For example, the electronic device can move data to more reliable blocks and/or retire blocks that are close to failure, thereby improving overall device reliability.

    Abstract translation: 提供了系统和方法，用于在非易失性存储器（“NVM”）的设备启动期间处理错误。 电子设备的NVM接口可配置为在设备启动时检测错误并维护易失性存储器中的错误日志。 一旦设备启动完成，电子设备的NVM驱动程序可以配置为使用错误日志来校正检测到的错误。 例如，电子设备可以将数据移动到更可靠的块和/或接近故障的退出块，从而提高整体设备的可靠性。

    DYNAMIC ALLOCATION OF POWER BUDGET FOR A SYSTEM HAVING NON-VOLATILE MEMORY
    8.
    发明申请
    DYNAMIC ALLOCATION OF POWER BUDGET FOR A SYSTEM HAVING NON-VOLATILE MEMORY 审中-公开
    具有非易失性存储器的系统的动力预算动态分配

    公开(公告)号：WO2012018605A1

    公开(公告)日：2012-02-09

    申请号：PCT/US2011/045308

    申请日：2011-07-26

    Applicant: APPLE INC. ,  WAKRAT, Nir, J. ,  HERMAN, Kenneth ,  BYOM, Matthew

    Inventor： WAKRAT, Nir, J. ,  HERMAN, Kenneth ,  BYOM, Matthew

    IPC: G06F1/32

    CPC classification number: G06F1/3268 ,  G06F1/3203 ,  G06F1/3225 ,  G06F1/3237 ,  G06F1/324 ,  Y02D10/126

    Abstract: Systems and methods are disclosed for dynamically allocating power for a system having non- volatile memory. A power budgeting manager of a system can determine if the total amount of power available for the system is below a pre-determined power level (e.g., a low power state). While the system is operating in the low power state, the power budgeting manager can dynamically allocate power among various components of the system (e.g., a processor and non¬ volatile memory).

    Abstract translation: 公开了用于为具有非易失性存储器的系统动态分配功率的系统和方法。 系统的功率预算管理器可以确定系统可用的总功率是否低于预定功率电平（例如，低功率状态）。 当系统工作在低功率状态时，功率预算管理器可以在系统的各个组件（例如，处理器和非易失性存储器）之间动态分配功率。

    DATA WHITENING FOR WRITING AND READING DATA TO AND FROM A NON-VOLATILE MEMORY
    9.
    发明申请
    DATA WHITENING FOR WRITING AND READING DATA TO AND FROM A NON-VOLATILE MEMORY 审中-公开
    数据白名字写入和读取非易失性存储器中的数据

    公开(公告)号：WO2010101598A1

    公开(公告)日：2010-09-10

    申请号：PCT/US2009/069050

    申请日：2009-12-21

    Applicant: APPLE INC. ,  HERMAN, Kenneth ,  BYOM, Matthew ,  SMITH, Michael, J. ,  TOELKES, Tahoma, M.

    Inventor： HERMAN, Kenneth ,  BYOM, Matthew ,  SMITH, Michael, J. ,  TOELKES, Tahoma, M.

    IPC: G06F11/30

    CPC classification number: G06F12/1408 ,  G06F12/0246 ,  G06F21/72 ,  G06F21/79 ,  G06F2221/2107 ,  G11C16/10 ,  G11C16/22

    Abstract: Systems, apparatuses, and methods are provided for whitening and managing data for storage in non-volatile memories, such as Flash memory. In some embodiments, an electronic device such as media player is provided, which may include a system-on-a-chip (SoC) and a non- volatile memory. The SoC may include SoC control circuitry and a memory interface that acts as an interface between the SoC control circuitry and the non-volatile memory. The SoC can also include an encryption module, such as a block cipher based on the Advanced Encryption Standard (AES). The memory interface can direct the encryption module to whiten all types of data prior to storage in the non-volatile memory, including sensitive data, non-sensitive data, and memory management data. This can, for example, prevent or reduce program-disturb problems or other read/write/erase reliability issues.

    Abstract translation: 提供了用于白化和管理数据以存储在诸如闪存的非易失性存储器中的系统，装置和方法。 在一些实施例中，提供诸如媒体播放器的电子设备，其可以包括片上系统（SoC）和非易失性存储器。 SoC可以包括SoC控制电路和用作SoC控制电路和非易失性存储器之间的接口的存储器接口。 SoC还可以包括加密模块，例如基于高级加密标准（AES）的块密码。 存储器接口可以指示加密模块在存储在非易失性存储器之前对所有类型的数据进行白化，包括敏感数据，非敏感数据和存储器管理数据。 这可以例如防止或减少程序干扰问题或其他读/写/擦除可靠性问题。

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