HIGH INPUT/OUTPUT, LOW PROFILE PACKAGE-ON-PACKAGE SEMICONDUCTOR SYSTEM

    公开(公告)号:WO2009026224A3

    公开(公告)日:2009-02-26

    申请号:PCT/US2008/073475

    申请日:2008-08-18

    Abstract: A package-on-package system (100) has a first subsystem (191) interconnected with a second subsystem (192) by solder connectors. The first subsystem has an insulating, trace- laminated, sheet- like carrier (101), which is laminated (102) with an insulating trace- laminated frame (110) exposing a central portion (103) of the carrier. A first chip (160) is disposed in the central portion, with a second chip (170) on top; the height of the assembled chips approximates the frame height (111). Bondable contact pads (104) are in the central portion, and solderable terminals (121); pitch center-to-center 0.65 mm or less) on the frame. The second subsystem has a laminated substrate (194) with at least one chip attached, and terminals (195) in locations matching the terminals (121) on the frame of the first subsystem. The terminals of both subsystems are interconnected with solder (193) of a higher reflow temperature than additional solder balls (190) for connecting to external parts.

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