Abstract:
An improved method of performing sidewall spacer image transfer is presented. The method includes forming a set of sidewall spacers (109a) next to a plurality of mandrels (106a), the set of sidewall spacers being directly on top of a hard-mask layer (105); transferring image of at least a portion of the set of sidewall spacers to the hard- mask layer to form a device pattern (105a); and transferring the device pattern from the hard- mask layer to a substrate (101) underneath the hard-mask layer.
Abstract:
An improved method of performing sidewall spacer image transfer is presented. The method includes forming a set of sidewall spacers (109a) next to a plurality of mandrels (106a), the set of sidewall spacers being directly on top of a hard-mask layer (105); transferring image of at least a portion of the set of sidewall spacers to the hard- mask layer to form a device pattern (105a); and transferring the device pattern from the hard- mask layer to a substrate (101) underneath the hard-mask layer.
Abstract:
A method for self-aligned gate patterning is disclosed. Two masks are used to process adjacent semiconductor components, such as an nFET and pFET that are separated by a shallow trench isolation region. The mask materials are chosen to facilitate selective etching. The second mask is applied while the first mask is still present, thereby causing the second mask to self align to the first mask. This avoids the undesirable formation of a stringer over the shallow trench isolation region, thereby improving the yield of a semiconductor manufacturing operation.