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    ETCH PROFILE CONTROL
    1.
    发明申请
    ETCH PROFILE CONTROL 审中-公开
    ETCH简档控制

    公开(公告)号：WO2006107495A1

    公开(公告)日：2006-10-12

    申请号：PCT/US2006/008302

    申请日：2006-03-07

    Applicant: LAM RESEARCH CORPORATION ,  RUSU, Camelia ,  HUANG, Zhisong ,  SRINIVASAN, Mukund ,  HUDSON, Eric, A. ,  EPPLER, Aaron

    Inventor： RUSU, Camelia ,  HUANG, Zhisong ,  SRINIVASAN, Mukund ,  HUDSON, Eric, A. ,  EPPLER, Aaron

    IPC: H01L21/311

    CPC classification number: H01L21/31116

    Abstract: A method for etching a dielectric layer over a substrate and disposed below a mask is provided. The substrate is placed in a plasma processing chamber. An etchant gas comprising O2 and a sulfur component gas comprising at least one of H2S and a compound containing at least one carbon sulfur bond is provided into the plasma chamber. A plasma is formed from the etchant gas. Features are etched into the etch layer through the photoresist mask with the plasma from the etchant gas.

    Abstract translation: 提供了一种用于在衬底上蚀刻介质层并且设置在掩模下方的方法。 将基板放置在等离子体处理室中。 包含O 2和包含至少一种H2S的硫成分气体的蚀刻剂气体和含有至少一个碳硫键的化合物被提供到等离子体室中。 等离子体由蚀刻剂气体形成。 通过来自蚀刻剂气体的等离子体通过光致抗蚀剂掩模将特征蚀刻到蚀刻层中。

    STEPPED UPPER ELECTRODE FOR PLASMA PROCESSING UNIFORMITY
    3.
    发明申请
    STEPPED UPPER ELECTRODE FOR PLASMA PROCESSING UNIFORMITY 审中-公开
    用于等离子体加工均质的梯级上电极

    公开(公告)号：WO0231859A3

    公开(公告)日：2002-09-12

    申请号：PCT/US0142611

    申请日：2001-10-10

    Applicant: LAM RES CORP ,  DHINDSA RAJINDER ,  SRINIVASAN MUKUND ,  EPPLER AARON ,  LENZ ERIC

    Inventor： DHINDSA RAJINDER ,  SRINIVASAN MUKUND ,  EPPLER AARON ,  LENZ ERIC

    IPC: H01J37/32 ,  H01L21/3065

    CPC classification number: H01J37/32009 ,  H01J37/3244 ,  Y10T156/10

    Abstract: A plasma discharge electrode having a front surface with a central portion thereof including gas outlets discharging a process gas which forms a plasma and a peripheral portion substantially surrounding the gas outlets. The peripheral portion has at least one step for controlling a density of the plasma formed by the electrode. The electrode can be used as the grounded upper electrode in a parallel plate plasma processing apparatus such as a plasma etching apparatus. The geometric features of the step and of a corresponding edge ring on the lower electrode can be varied to achieve the desired etch rate profile across a wafer surface.

    Abstract translation: 一种具有前表面的等离子体放电电极，其中心部分包​​括排出形成等离子体的工艺气体的气体出口和基本上围绕气体出口的周边部分。 周边部分具有用于控制由电极形成的等离子体的密度的至少一个步骤。 在等离子体蚀刻装置等平板等离子体处理装置中，电极可以用作接地上电极。 可以改变下部电极上的台阶和相应的边缘环的几何特征以实现跨晶片表面所需的蚀刻速率分布。

    PROCESS FOR ETCHING DIELECTRIC FILMS WITH IMPROVED RESIST AND/OR ETCH PROFILE CHARACTERISTICS
    4.
    发明申请
    PROCESS FOR ETCHING DIELECTRIC FILMS WITH IMPROVED RESIST AND/OR ETCH PROFILE CHARACTERISTICS 审中-公开

    公开(公告)号：WO2003107410A3

    公开(公告)日：2003-12-24

    申请号：PCT/US2003/018791

    申请日：2003-06-13

    Applicant: LAM RESEARCH CORPORATION ,  EPPLER, Aaron ,  SRINIVASAN, Mukund ,  CHEBI, Robert

    Inventor： EPPLER, Aaron ,  SRINIVASAN, Mukund ,  CHEBI, Robert

    IPC: H01L21/311

    Abstract: A process of etching openings in a dielectric layer includes supporting a semiconductor substrate in a plasma etch reactor, the substrate having a dielectric layer and a patterned photoresist and/or hardmask layer above the dielectric layer; supplying to the plasma etch reactor an etchant gas comprising (a) a fluorocarbon gas (CxFyHz, where x 1, y 1, and z 0), (b) a silane-containing gas, hydrogen or a hydrocarbon gas (CxHy, where x 1 and y 4), (c) an optional oxygen-containing gas, and (d) an optional inert gas, wherein the flow rate ratio of the silane-containing gas to fluorocarbon gas is less than or equal to 0.1, or the flow rate ratio of the hydrogen or hydrocarbon gas to fluorocarbon gas is less than or equal to 0.5; energizing the etchant gas into a plasma; and plasma etching openings in the dielectric layer with enhanced photoresist/hardmask to dielectric layer selectivity and/or minimal photoresist distortion or striation.

    ETCHING METHOD INCLUDING PHOTORESIST PLASMA CONDITIONING STEP WITH HYDROGEN FLOW RATE RAMPING
    5.
    发明申请
    ETCHING METHOD INCLUDING PHOTORESIST PLASMA CONDITIONING STEP WITH HYDROGEN FLOW RATE RAMPING 审中-公开
    蚀刻方法，其中包括具有氢气流速波动的光电子等离子体调节步骤

    公开(公告)号：WO2006049736A1

    公开(公告)日：2006-05-11

    申请号：PCT/US2005/034172

    申请日：2005-09-23

    Applicant: LAM RESEARCH CORPORATION ,  KANARIK, Keren, Jacobs ,  EPPLER, Aaron

    Inventor： KANARIK, Keren, Jacobs ,  EPPLER, Aaron

    IPC: G03F7/40 ,  H01L21/027 ,  H01L21/311

    CPC classification number: H01L21/0276 ,  H01L21/31116

    Abstract: A method for etching a feature in an etch layer (208) through a photoresist mask (212) over a substrate (204) is provided. A substrate with an etch layer disposed below a photoresist mask is placed in a process chamber. The photoresist mask is conditioned, wherein the conditioning comprises providing a conditioning gas comprising a hydrogen containing gas with a flow rate and at least one of a fluorocarbon and a hydrofluorocarbon with a flow rate to the process chamber; and energizing the conditioning gas to form the conditioning plasma so as to harden the photoresist (214). The conditioning plasma is stopped. An etch plasma is provided to the process chamber, wherein the etch plasma is different than the conditioning plasma. A feature is etched in the etch layer (208) with the etch plasma.

    Abstract translation: 提供了一种用于通过衬底（204）上的光致抗蚀剂掩模（212）蚀刻蚀刻层（208）中的特征的方法。 将具有设置在光致抗蚀剂掩模下方的蚀刻层的衬底放置在处理室中。 对光致抗蚀剂掩模进行调节，其中调节装置包括提供调节气体，该调节气体包括具有流速的含氢气体和至处理室的流速的碳氟化合物和氢氟烃中的至少一种; 并使调节气体通电以形成调理等离子体，从而使光致抗蚀剂（214）硬化。 调理等离子体停止。 蚀刻等离子体被提供到处理室，其中蚀刻等离子体不同于调节等离子体。 蚀刻等离子体在蚀刻层（208）中蚀刻特征。

    STEPPED UPPER ELECTRODE FOR PLASMA PROCESSING UNIFORMITY
    6.
    发明申请
    STEPPED UPPER ELECTRODE FOR PLASMA PROCESSING UNIFORMITY 审中-公开
    用于等离子体加工均质的梯级上电极

    公开(公告)号：WO0231859A9

    公开(公告)日：2003-05-22

    申请号：PCT/US0142611

    申请日：2001-10-10

    Applicant: LAM RES CORP ,  DHINDSA RAJINDER ,  SRINIVASAN MUKUND ,  EPPLER AARON ,  LENZ ERIC

    Inventor： DHINDSA RAJINDER ,  SRINIVASAN MUKUND ,  EPPLER AARON ,  LENZ ERIC

    IPC: H01J37/32 ,  H01L21/3065

    CPC classification number: H01J37/32009 ,  H01J37/3244 ,  Y10T156/10

    Abstract: A plasma discharge electrode having a front surface with a central portion thereof including gas outlets discharging a process gas which forms a plasma and a peripheral portion substantially surrounding the gas outlets. The peripheral portion has at least one step for controlling a density of the plasma formed by the electrode. The electrode can be used as the grounded upper electrode in a parallel plate plasma processing apparatus such as a plasma etching apparatus. The geometric features of the step and of a corresponding edge ring on the lower electrode can be varied to achieve the desired etch rate profile across a wafer surface.

    Abstract translation: 一种具有前表面的等离子体放电电极，其中心部分包​​括排出形成等离子体的工艺气体的气体出口和基本上围绕气体出口的周边部分。 周边部分具有用于控制由电极形成的等离子体的密度的至少一个步骤。 在等离子体蚀刻装置等平板等离子体处理装置中，电极可以用作接地上电极。 可以改变下部电极上的台阶和相应的边缘环的几何特征以实现跨晶片表面所需的蚀刻速率分布。

    ETCH WITH RAMPING
    8.
    发明申请
    ETCH WITH RAMPING 审中-公开
    ETCH与RAMPING

    公开(公告)号：WO2005031835A1

    公开(公告)日：2005-04-07

    申请号：PCT/US2004/030338

    申请日：2004-09-15

    Applicant: LAM RESEARCH CORPORATION ,  JACOBS, Keren ,  EPPLER, Aaron

    Inventor： JACOBS, Keren ,  EPPLER, Aaron

    IPC: H01L21/302

    CPC classification number: H01J37/32082 ,  H01L21/31116

    Abstract: A method for etching a feature in an etch layer through a mask over a substrate. The substrate is placed in a process chamber. An etch plasma is provided to the process chamber, where the etch plasma begins to etch. A feature is etched in the etch layer with the etch plasma. At least one etch plasma parameter is ramped during the etching of the feature to optimize plasma parameters with the changing etch depth and the feature is etched with the ramped plasma until the feature is etched to a feature depth.

    Abstract translation: 一种用于通过衬底上的掩模蚀刻蚀刻层中的特征的方法。 将基板放置在处理室中。 将蚀刻等离子体提供给处理室，其中蚀刻等离子体开始蚀刻。 蚀刻等离子体在蚀刻层中蚀刻特征。 在蚀刻特征期间，至少一个蚀刻等离子体参数被斜坡化，以改变蚀刻深度来优化等离子体参数，并且利用斜坡等离子体蚀刻特征，直到特征被蚀刻到特征深度。

    PROCESS FOR ETCHING DIELECTRIC FILMS WITH IMPROVED RESIST AND/OR ETCH PROFILE CHARACTERISTICS
    10.
    发明申请
    PROCESS FOR ETCHING DIELECTRIC FILMS WITH IMPROVED RESIST AND/OR ETCH PROFILE CHARACTERISTICS 审中-公开
    用于蚀刻电阻膜和/或蚀刻轮廓特性的方法

    公开(公告)号：WO2003107410A2

    公开(公告)日：2003-12-24

    申请号：PCT/US2003/018791

    申请日：2003-06-13

    Applicant: LAM RESEARCH CORPORATION ,  EPPLER, Aaron ,  SRINIVASAN, Mukund ,  CHEBI, Robert

    Inventor： EPPLER, Aaron ,  SRINIVASAN, Mukund ,  CHEBI, Robert

    IPC: H01L21/311

    CPC classification number: H01L21/32139 ,  H01L21/0276 ,  H01L21/31116 ,  H01L21/31138 ,  H01L21/32136

    Abstract: A process of etching openings in a dielectric layer includes supporting a semiconductor substrate in a plasma etch reactor, the substrate having a dielectric layer and a patterned photoresist and/or hardmask layer above the dielectric layer; supplying to the plasma etch reactor an etchant gas comprising (a) a fluorocarbon gas (CxFyHz, where x 1, y 1, and z 0), (b) a silane-containing gas, hydrogen or a hydrocarbon gas (CxHy, where x 1 and y 4), (c) an optional oxygen-containing gas, and (d) an optional inert gas, wherein the flow rate ratio of the silane-containing gas to fluorocarbon gas is less than or equal to 0.1, or the flow rate ratio of the hydrogen or hydrocarbon gas to fluorocarbon gas is less than or equal to 0.5; energizing the etchant gas into a plasma; and plasma etching openings in the dielectric layer with enhanced photoresist/hardmask to dielectric layer selectivity and/or minimal photoresist distortion or striation.

    Abstract translation: 蚀刻电介质层中的开口的过程包括在等离子体蚀刻反应器中支撑半导体衬底，所述衬底在电介质层上方具有电介质层和图案化的光致抗蚀剂和/或硬掩模层; 向等离子体蚀刻反应器供应包括（a）碳氟化合物气体（CxFyHz，其中x 1，y 1和z 0）的蚀刻剂气体，（b）含硅烷的气体，氢气或烃气体（CxHy，其中x 1和y 4），（c）任选的含氧气体，和（d）任选的惰性气体，其中含硅烷气体与氟碳化合物气体的流量比小于或等于0.1， 氢气或碳氢化合物气体与碳氟化合物气体的比率小于或等于0.5; 将蚀刻剂气体激发成等离子体; 以及具有增强的光致抗蚀剂/硬掩模的电介质层中的等离子体蚀刻开口至介电层选择性和/或最小的光致抗蚀剂失真或条纹。

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