LAND GRID ARRAY SOCKET ASSEMBLY
    1.
    发明申请

    公开(公告)号:US20130208410A1

    公开(公告)日:2013-08-15

    申请号:US13822702

    申请日:2010-10-28

    CPC classification number: H05K7/10 G06F1/16 H05K7/1069

    Abstract: A land grid array socket assembly comprises a plurality of cells, with each cell comprising an insulative body having a top surface, and contact conductor that has a first portion that extends from a board contact point up to and beyond the top surface to a contact bend, and a second portion that extends from the contact bend to terminate below the top surface and within the insulative body.

    Abstract translation: 一种焊盘格阵列插座组件包括多个单元,每个单元包括具有顶表面的绝缘体,以及具有第一部分的接触导体,该第一部分从板接触点延伸到顶表面并超出顶表面至接触弯曲部 以及第二部分,其从接触弯曲部延伸以终止在顶表面下方并且在绝缘体内。

    Land grid array socket assembly
    2.
    发明授权
    Land grid array socket assembly 有权
    地格栅阵列插座组件

    公开(公告)号:US09060436B2

    公开(公告)日:2015-06-16

    申请号:US13822702

    申请日:2010-10-28

    CPC classification number: H05K7/10 G06F1/16 H05K7/1069

    Abstract: A land grid array socket assembly comprises a plurality of cells, with each cell comprising an insulative body having a top surface, and contact conductor that has a first portion that extends from a board contact point up to and beyond the top surface to a contact bend, and a second portion that extends from the contact bend to terminate below the top surface and within the insulative body.

    Abstract translation: 一种焊盘格阵列插座组件包括多个单元,每个单元包括具有顶表面的绝缘体,以及具有第一部分的接触导体,该第一部分从板接触点延伸到顶表面并超出顶表面至接触弯曲部 以及第二部分,其从接触弯曲部延伸以终止在顶表面下方并在绝缘体内。

    Versatile printed circuit board for testing processing reliability
    3.
    发明授权
    Versatile printed circuit board for testing processing reliability 失效
    多功能印刷电路板,用于测试加工可靠性

    公开(公告)号:US6040530A

    公开(公告)日:2000-03-21

    申请号:US986078

    申请日:1997-12-05

    Abstract: A printed circuit board can be used as a test card. The printed circuit board has a first image and a second image. The first image includes a first array pattern for attaching a package, a first power plane, and a first ground plane. The second image includes a second array pattern for attaching a package, a second power plane, and a second ground plane. A first routing area between the first image and the second image electrically and physically isolates the first power plane from the second power plane. The first routing area also physically isolates the first ground plane from the second ground plane. A first single trace extends through the first routing area. The first single trace electrically connects the first ground plane to the second ground plane.

    Abstract translation: 印刷电路板可用作测试卡。 印刷电路板具有第一图像和第二图像。 第一图像包括用于附接封装的第一阵列图案,第一电源平面和第一接地平面。 第二图像包括用于附接封装的第二阵列图案,第二电源平面和第二接地平面。 第一图像和第二图像之间的第一路由区域电和物理地隔离第一电力平面与第二电力平面。 第一布线区域还将第一接地平面与第二接地平面物理隔离。 第一个单一轨迹延伸穿过第一个路线区域。 第一单个迹线将第一接地平面电连接到第二接地平面。

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