公开(公告)号：JPH04373339A

公开(公告)日：1992-12-25

申请号：JP17871791

申请日：1991-06-24

Applicant: GRAPHICS COMMUNICATION TECH

Inventor： KOBAYASHI TAKAYUKI ,  SHOMURA KAZUYOSHI

IPC: H04J3/06 ,  H04J3/00 ,  H04L7/08 ,  H04M11/00

Abstract: PURPOSE:To detect FAW on continuous frames for synchronizing channels in an ISDN. CONSTITUTION:At an inter-channel synchronizing detecting device to detect a series of data for FAW on the continuous frame concerning a frame constituting data for the unit of a word and having the data for FAW at a prescribed bit position, a first latch register LT 1 to latch the data on the transmitted frames for the unit of one word, a first shift register SR 2 to successively fetch and shift the latch data as well as a RAM to successively store them, a second latch register LT 2 to latch the first written one data in the RAM, a second shift register SR 3 divided into the units of 8 bits to successively fetch and shift the data, and a detecting means DET to monitor and detect whether the data at the same bit position in the respective latch registers and shift registers form a series of data on the continuous frames or not are provided.

公开(公告)号：JPH04340884A

公开(公告)日：1992-11-27

申请号：JP14080991

申请日：1991-05-16

Applicant: GRAPHICS COMMUNICATION TECH

Inventor： KAKII EIJI ,  MARUYAMA MASANORI ,  FUJIWARA HIROSHI

IPC: H04N7/24 ,  H04N11/04 ,  H04N19/00

Abstract: PURPOSE:To prevent the degradation of the picture quality by directly transmitting the frame data for the code processing without suppressing the frame data when the frame skip is above the normal value. CONSTITUTION:A frame skip calculation part 21 counts the number of the frame synchronizing signal existing between the frame start signal and the next frame start signal. In this case, the sizes of the set value and the skip counted value are compared in a comparison part 22. When the skip counted value is below the set value, a switch 20 is brought down to the side of the solid line by the output of the comparison part 22. By this, the input data is inputted in a difference part 10. When the skip counted value is above the set value, the switch 20 is brought down to the side of the dotted line by the output of the comparison part 22. Thus, the input data is directly inputted into an encoding part 15 and is directly inputted in a frame memory 21.

公开(公告)号：JPH04330886A

公开(公告)日：1992-11-18

申请号：JP13050891

申请日：1991-05-02

Applicant: GRAPHICS COMMUNICATION TECH

Inventor： MARUYAMA MASANORI ,  FUJIWARA HIROSHI

IPC: H04B14/00 ,  H04N1/21 ,  H04N1/41 ,  H04N19/00 ,  H04N19/132 ,  H04N19/142 ,  H04N19/149 ,  H04N19/15 ,  H04N19/176 ,  H04N19/423 ,  H04N19/46 ,  H04N19/60 ,  H04N19/70 ,  H04N19/91

Abstract: PURPOSE:To prevent the occurrence of a logical overflowing at a transmitting buffer by performing the encoding only to a low frequency area when the storing quantity of the transmitting buffer is the logical buffer size or above at the time of the scene change. CONSTITUTION:A zigzag converting part 1 zigzag-converts the time arrangement sequence of an image signal, a quantizing part 2 quantizes the converted result, a variable length coding part 4 variable-length-codes in accordance with quantizing data and temporarily stores to a transmitting buffer 7. Further, a multiplexer 3 is provided between the quantizing part 2 and the variable length encoding part 4 and the selection is performed by a scene change discriminating part 5 and a logical overflowing discriminating part 6. That is, the scene change discriminating part 5 discriminates whether or not the scene change exists, the logical overflowing discriminating part 6 fetches the storing quantity of the transmitting buffer 7 and the discriminated result of the scene change discriminating part 5, and when the overflowing can be forecast, the encoding prohibiting data are selected and when the danger of the overflowing occurrence does not exist, the quantizing data are selected.

公开(公告)号：JPH04235471A

公开(公告)日：1992-08-24

申请号：JP1275191

申请日：1991-01-09

Applicant: GRAPHICS COMMUNICATION TECH

Inventor： OYAMA KOICHI ,  SON GIYOUKOU

IPC: H04N5/21 ,  G09G5/00

Abstract: PURPOSE:To greatly improve a noise removing efficiency with a small distortion by removing the noise by changing a multiplying coefficient by utilizing the difference in visual senses in the levels of the brightness of a picture against the distortion. CONSTITUTION:When an input picture signal 71 is impressed, the level of the brightness and the polarity of the input picture signal 71 are judged by a judgement section 51. When a visual sense to the distortion called as commet tail is low, a noise reducing efficiency is enhanced by utilizing a coefficient K whose value is smaller than 1. On the contrary, when the visual sense to the distortion is high, the occurrence of the distortion is reduced in an area where the visual sense to the distortion is high by utilizing the coefficient K whose value is closed to 1.

公开(公告)号：JPH04142192A

公开(公告)日：1992-05-15

申请号：JP26393390

申请日：1990-10-03

Applicant: GRAPHICS COMMUNICATION TECH

Inventor： SAKAGUCHI TOSHIBUMI ,  OYAMA KOICHI

IPC: H04N19/60 ,  H04N1/413 ,  H04N1/415 ,  H04N19/00 ,  H04N19/12 ,  H04N19/176 ,  H04N19/196 ,  H04N19/46 ,  H04N19/625 ,  H04N19/70

Abstract: PURPOSE:To encode and compress even a picture part of quick motion with a lower degree of degradation of the picture quality by detecting it by a feature detector whether a preliminarily determined feature exists in an inputted picture signal or not and encoding the signal by one encoder selected in accordance with the detection result. CONSTITUTION:A feature extractor 22 and plural encoders 23 and 24 are provided, and features in the block of a picture signal are extracted by the feature extractor 22. Switches 21 and 25 are interlocked by the extraction results to control switching, and thereby, the picture signal 1 is encoded and compressed by the encoder 23 or 24 in accordance with the feature extraction result, and the signal is transmitted to a transmission line 3 together with the feature extraction result. Thus, even the picture part of quick motion is encoded and compressed with a lower degree of degradation of the picture quality.

公开(公告)号：JPH048070A

公开(公告)日：1992-01-13

申请号：JP11095990

申请日：1990-04-26

Applicant: GRAPHICS COMMUNICATION TECH

Inventor： SON GIYOUKOU ,  OYAMA KOICHI

IPC: H04N5/21 ,  H04N7/015

Abstract: PURPOSE:To reduce distortion of a valid signal and to obtain a more natural picture by obtaining an absolute value of a sum of an object picture and inter- frame differernce of picture elements in the vicinity of the object picture or an absolute value of a sum of interframe difference values of picture elements only in the vicinity other than the object picture elements and deciding a noise elimination characteristic from an obtained evaluation value. CONSTITUTION:A signal 50 representing a difference delayed by a picture element memory 14 represents a difference of a picture element P0 being a current noise processing object and the difference is inputted to a picture element memory 15, an evaluation value calculation circuit 17 and a noise eliminating circuit 18. The picture element memory 15 delays the received signal 50 by a time for one picture element similarly in the case of the picture element memory 14 and outputs the result. A signal 52 representing the delayed difference by the picture element memory 15 represents the difference of the picture element P2 and it is inputted to a line memory 16 and the evaluation value calculation circuit 17. A signal 51 representing the delayed difference by the line memory 16 represents a difference of the picture element P1 and the result is inputted to the evaluation value calculation circuit 17.

公开(公告)号：JPH03274920A

公开(公告)日：1991-12-05

申请号：JP7349390

申请日：1990-03-26

Applicant: GRAPHICS COMMUNICATION TECH

Inventor： FUJIWARA HIROSHI ,  SAKAGUCHI TOSHIBUMI ,  SHIMAZU AKIO ,  KUN MIN YAN ,  MIN TEIN SAN ,  KOU FUU TSUOU

IPC: H03M7/40 ,  H03M7/42

Abstract: PURPOSE:To accelerate the variable length encoding and decoding processing of input data by selecting variable length code word length data and variable length encoding data corresponding to the encoding rule of fixed length encoding input data executing the variable length encoding processing or the like. CONSTITUTION:In the fixed length encoding input data to be successively inputted, the data not knowing the encoding rule is outputted as the fixed length encoding data as it is, and the data knowing the encoding rule is successively outputted through an input data register 23 of a signal encoding part 4 for each bit. Then, plural variable length code word length tables 25 are refereed to and based on a select signal corresponding to the rule, a select circuit 30 selects the word length data corresponding to the rule from an encoding control unit 24. Similarly, a select circuit 31 selects the encoding data and the encoded variable length encoding data is outputted according to the rule from a transmitting data generating circuit 32. Then, the variable length encoding data is similarly decoded as well and therefore, without complicating configuration, the variable length data can be encoded and decoded at high speed.

公开(公告)号：JPH03106282A

公开(公告)日：1991-05-02

申请号：JP24445689

申请日：1989-09-20

Applicant: GRAPHICS COMMUNICATION TECH

Inventor： FUJIWARA HIROSHI ,  MARUYAMA MASANORI ,  JOFU HIROO

IPC: G06Q10/06 ,  G06T9/00 ,  G06T13/00 ,  G06T13/80 ,  H04N11/04

Abstract: PURPOSE:To detect an accurate dynamic vector and to expand a retrieving block when necessary by allowing operation modules to execute respective operations in parallel while utilizing picture element data or operated result data to be mutually used by the modules. CONSTITUTION:The dynamic vector detector is provided with (p) computing means 151 to 15p for computing evaluation data, (p) multi-connected registers 141 to 14p for delaying respective picture element data in the 1st block by a prescribed time and a dynamic vector data detecting means 16 for finding out the minimum value and a position. Then (m) multi-connected operation modules 4 each of which computes the minimum value and a position in a part of each of two areas adjacent to the 2nd block out of (m+1) divided blocks so that the output of the final register 14p in the preceding operation module is successively inputted to the succeeding operation module 4 to set up the number of picture elements, the number (m) of modules and the number (p) of arithmetic means under a prescribed condition. Consequently, an accurate dynamic vector can be detected and the retrieving blocks can be optionally expanded only by cascading plural operation modules 4 having the same constitution.

公开(公告)号：JPH02247769A

公开(公告)日：1990-10-03

申请号：JP6754489

申请日：1989-03-22

Applicant: GRAPHICS COMMUNICATION TECH

Inventor： ICHIKAWA MASAHIRO ,  SHOMURA KAZUYOSHI

IPC: G06F15/16 ,  G06F15/17 ,  G06F15/173 ,  G06F15/177 ,  G06F15/80

Abstract: PURPOSE:To attain the parallel processing of an optional processing program by connecting plural unit processors to a host processor through a switch whose connecting state can be varied and switching the switch in accordance with a processing program. CONSTITUTION:Each of the unit processors 9 has a function for starting a checking program at the time of loading down the program and sending the started result to a connected serial link 8. An I/O processor 5 successively switches the connection of a channel Ch30 or Ch31 to another channel to receive the data. Thereby, the processor 5 can know which number of the serial link of the processors 9 and which channel of the switch 10 are connected to each other and sends the information to the host processor 2. If stepped processors are not connected to the processor 5 like channels Ch28, Ch29 e.g., no connection of the processor 9 is certified by receiving a down-load error and the information is transferred to the processor 2.

公开(公告)号：JPH02234587A

公开(公告)日：1990-09-17

申请号：JP5377289

申请日：1989-03-08

Applicant: GRAPHICS COMMUNICATION TECH

Inventor： OYAMA KOICHI ,  SAKAGUCHI TOSHIBUMI ,  KATAYAMA YASUO

IPC: H04N19/50 ,  G06T9/00 ,  G06T13/00 ,  G06T13/80 ,  H04N19/44 ,  H04N19/587 ,  H04N19/59

Abstract: PURPOSE:To obtain moving picture information without using a moving vector by storing picture information in the unit of frames to plural frame memories and reproducing it from a neutral network after picture information framed in the unit of frames is decoded by a decoder. CONSTITUTION:A memory 5 stores picture information by one frame, its picture signal is outputted to an output device 9 and a frame memory 6 and the output device 9 outputs the picture information by one frame externally, partial picture signals 72, 71 of the picture information by one frame stored in the frame memories 6, 5 are subjected to the processing method of a neural network 7 thereby reproducing a frame omitted and interpolated. Thus, the device outputs picture information from the frame memory 5 and the picture information from a frame memory 8 alternately to output the consecutive moving picture information externally without using the moving vector information.