Abstract:
PROBLEM TO BE SOLVED: To provide a decoration button configured to be fixed on a surface sheet of personal items such as a bag or sandals. SOLUTION: A button includes a bottom plate 30 with a flat first face and a curved second face, a stem 20 extending almost perpendicularly from the bottom plate 30, a top plate 10 with first and second surfaces, the first surface having a plurality of accepting grooves and the second surface having a receptacle for the stem 20, and a connector 40 configured to connect the stem 20 to the receptacle of the second surface of the top plate. The button is configured to be fixed with the stem through a hole provided in a sheet and the top and bottom surfaces disposed on both sides of the sheet. The second surface of the bottom plate 30 may render low resistance to a movement in a direction parallel to the first surface of the bottom plate 30. COPYRIGHT: (C)2009,JPO&INPIT
Abstract:
The present invention relates to a computer keyboard provided with an optical mouse (light mouse) used with a thumb, for improving the inconvenience of moving between a keyboard and a mouse when using a computer, wherein while both hands remain positioned on the computer keyboard, the thumb of one hand may move a mouse pointer and the thumb of the other hand may perform a clicking operation, and the clicking operation can also be performed using the index finger, the middle finger, and the ring finger of the hand that moves the mouse pointer.
Abstract:
Provided is a method of providing information through a mobile device, in which an information providing screen is outputted only during the first activation performed within a predetermined time range designated by a user. Therefore, inconvenience resulting from repetitive outputs of the information providing screen can be resolved.
Abstract:
A semiconductor memory device includes a device isolation in a trench that defines first to third active patterns that are spaced apart from each other and having a long axis parallel to a first direction, first and second word lines extending in a second direction perpendicular to the first direction, a bit line, and a source line. The first and second active patterns are arranged in the second direction to constitute a column. The third active pattern is at a side of the column. The first word line intersects the first and second active patterns. The second word line intersects the third active pattern. When viewed from a plan view, the bit line extends in the first direction between the first and third active patterns, and the source line extends in the first direction between the second and third active patterns.
Abstract:
High density semiconductor memory devices are provided. The device may include a cell array region including a lower structure, an upper structure, and a selection structure, the selection structure being interposed between the lower and upper structures and including word lines, and a decoding circuit controlling voltages applied to the word lines. The decoding circuit may be configured to apply a first voltage to a pair of the word lines adjacent to each other and to apply a second voltage different from the first voltage to the remaining ones of the word lines, in response to word line address information input thereto.
Abstract:
A method for providing a content using the first screen of a portable communication terminal is provided. The method comprises the steps of: registering a first content as a content of interest; and providing a second content in the first screen displayed on a display unit when the communication terminal is switched from an inactive state to an active state. Here, the second content, which corresponds to a content related to the first content, is determined on the basis of the first content.
Abstract:
Semiconductor memory devices include unit cells two-dimensionally arranged along rows and columns in one cell array block. The unit cells are classified into a plurality of cell subgroups, and each of the cell subgroups includes the unit cells constituting a plurality of the rows. Each of the unit cells includes a selection element and a data storage part. A word line is connected to gate electrodes of selection elements of the unit cells constituting each column. Bit lines are connected to data storage parts of the unit cells constituting the rows. A source line, parallel to the bit line, is electrically connected to source terminals of the selection elements of the unit cells in each cell subgroup. The source line is parallel to the bit line. A distance between the source line and the select bit line is equal to a distance between the bit lines adjacent to each other.
Abstract:
According to an example embodiment, a variable resistance memory device includes a lower electrode that includes a spacer-shaped first sub lower electrode and a second sub lower electrode covering a curved sidewall of the first sub lower electrode. The second sub lower electrode extends upward to protrude above the top of the first sub lower electrode. The lower electrode includes an upward-tapered shape.
Abstract:
Semiconductor memory devices include unit cells two-dimensionally arranged along rows and columns in one cell array block. The unit cells are classified into a plurality of cell subgroups, and each of the cell subgroups includes the unit cells constituting a plurality of the rows. Each of the unit cells includes a selection element and a data storage part. A word line is connected to gate electrodes of selection elements of the unit cells constituting each column. Bit lines are connected to data storage parts of the unit cells constituting the rows. A source line, parallel to the bit line, is electrically connected to source terminals of the selection elements of the unit cells in each cell subgroup. The source line is parallel to the bit line. A distance between the source line and the select bit line is equal to a distance between the bit lines adjacent to each other.
Abstract:
A memory device includes a lower interconnection in a semiconductor substrate, the lower interconnection being made of a material different from the semiconductor substrate, a selection element on the lower interconnection, and a memory element on the selection element.