公开(公告)号：WO2022198548A1

公开(公告)日：2022-09-29

申请号：PCT/CN2021/082908

申请日：2021-03-25

Applicant: INTEL CORPORATION ,  GUO, Kaijie ,  RAJ, Ashok ,  SMITH, Ned ,  LI, Weigang ,  WANG, Junyuan ,  ZENG, Xin ,  WILL, Brian ,  FAN, Zijuan ,  KOUNAVIS, Michael E. ,  XIE, Qianjun ,  WANG, Yuan ,  HUO, Yao

Inventor： GUO, Kaijie ,  RAJ, Ashok ,  SMITH, Ned ,  LI, Weigang ,  WANG, Junyuan ,  ZENG, Xin ,  WILL, Brian ,  FAN, Zijuan ,  KOUNAVIS, Michael E. ,  XIE, Qianjun ,  WANG, Yuan ,  HUO, Yao

IPC: G06F13/00

Abstract: An embodiment of an integrated circuit may comprise memory to store respective resource control descriptors in correspondence with respective identifiers, and an input/output (IO) memory management unit (IOMMU) communicatively coupled to the memory, the IOMMU including circuitry to determine resource control information for an IO transaction based on a resource control descriptor stored in the memory that corresponds to an identifier associated with the IO transaction, and control utilization of one or more resources of the IOMMU based on the determined resource control information. Other embodiments are disclosed and claimed.

公开(公告)号：WO2007078672A2

公开(公告)日：2007-07-12

申请号：PCT/US2006/047234

申请日：2006-12-07

Applicant: INTEL CORPORATION ,  KING, Steven, R. ,  BERRY, Frank ,  KOUNAVIS, Michael, E.

Inventor： KING, Steven, R. ,  BERRY, Frank ,  KOUNAVIS, Michael, E.

CPC classification number: G06F11/1004 ,  G06F9/30003 ,  G06F9/30018 ,  G06F9/30032 ,  G06F15/76 ,  G06T1/20 ,  H03M13/00 ,  H03M13/09 ,  H03M13/093 ,  H03M13/096 ,  H03M13/157

Abstract: In one embodiment, the present invention includes a method for receiving incoming data in a processor and performing a checksum operation on the incoming data in the processor pursuant to a user-level instruction for the checksum operation. For example, a cyclic redundancy checksum may be computed in the processor itself responsive to the user-level instruction. Other embodiments are described and claimed.

Abstract translation: 在一个实施例中，本发明包括一种用于在处理器中接收输入数据并根据用于校验和操作的用户级指令对处理器中的输入数据执行校验和操作的方法。 例如，循环冗余校验和可以在处理器本身中响应于用户级指令而被计算。 描述并要求保护其他实施例。

公开(公告)号：WO2010057065A3

公开(公告)日：2010-08-19

申请号：PCT/US2009064493

申请日：2009-11-14

Applicant: INTEL CORP ,  MCKEEN FRANK ,  SAVAGAONKAR UDAY ,  ROZAS CARLOS V ,  GOLDSMITH MICHAEL A ,  HERBERT HOWARD C ,  ALTMAN ASHER ,  GRAUNKE GARY ,  DURHAM DAVID ,  JOHNSON SIMON P ,  KOUNAVIS MICHAEL E ,  SCARLATA VINCENT R ,  CIHULA JOSEPH ,  JEYASINGH STALINSELVARAJ ,  LINT BERNARD ,  NEIGER GIL ,  RODGERS DION ,  BRICKELL ERNIE ,  LI JIANGUO

Inventor： MCKEEN FRANK ,  SAVAGAONKAR UDAY ,  ROZAS CARLOS V ,  GOLDSMITH MICHAEL A ,  HERBERT HOWARD C ,  ALTMAN ASHER ,  GRAUNKE GARY ,  DURHAM DAVID ,  JOHNSON SIMON P ,  KOUNAVIS MICHAEL E ,  SCARLATA VINCENT R ,  CIHULA JOSEPH ,  JEYASINGH STALINSELVARAJ ,  LINT BERNARD ,  NEIGER GIL ,  RODGERS DION ,  BRICKELL ERNIE ,  LI JIANGUO

IPC: G06F3/06 ,  G06F9/06 ,  G06F9/44 ,  G06F21/56

CPC classification number: G06F9/30043 ,  G06F9/30032 ,  G06F21/56

Abstract: A technique to enable secure application and data integrity within a computer system. In one embodiment, one or more secure enclaves are established in which an application and data may be stored and executed.

Abstract translation: 一种在计算机系统内实现安全应用程序和数据完整性的技术。 在一个实施例中，建立一个或多个安全区域，其中可以存储和执行应用程序和数据。

公开(公告)号：WO2010057065A2

公开(公告)日：2010-05-20

申请号：PCT/US2009/064493

申请日：2009-11-14

Applicant: INTEL CORPORATION ,  MCKEEN, Frank ,  SAVAGAONKAR, Uday ,  ROZAS, Carlos, V. ,  GOLDSMITH, Michael, A. ,  HERBERT, Howard, C. ,  ALTMAN, Asher ,  GRAUNKE, Gary ,  DURHAM, David ,  JOHNSON, Simon, P. ,  KOUNAVIS, Michael, E. ,  SCARLATA, Vincent, R. ,  CIHULA, Joseph ,  JEYASINGH, Stalinselvaraj ,  LINT, Bernard ,  NEIGER, Gil ,  RODGERS, Dion ,  BRICKELL, Ernie ,  LI, Jianguo

Inventor： MCKEEN, Frank ,  SAVAGAONKAR, Uday ,  ROZAS, Carlos, V. ,  GOLDSMITH, Michael, A. ,  HERBERT, Howard, C. ,  ALTMAN, Asher ,  GRAUNKE, Gary ,  DURHAM, David ,  JOHNSON, Simon, P. ,  KOUNAVIS, Michael, E. ,  SCARLATA, Vincent, R. ,  CIHULA, Joseph ,  JEYASINGH, Stalinselvaraj ,  LINT, Bernard ,  NEIGER, Gil ,  RODGERS, Dion ,  BRICKELL, Ernie ,  LI, Jianguo

IPC: G06F21/24 ,  G06F9/06 ,  G06F3/06 ,  G06F9/44

CPC classification number: G06F9/30043 ,  G06F9/30032 ,  G06F21/56

Abstract: A technique to enable secure application and data integrity within a computer system. In one embodiment, one or more secure enclaves are established in which an application and data may be stored and executed.

Abstract translation: 一种在计算机系统内实现安全应用和数据完整性的技术。 在一个实施例中，建立一个或多个安全空间，其中可以存储和执行应用和数据。

公开(公告)号：WO2008121614A1

公开(公告)日：2008-10-09

申请号：PCT/US2008/058128

申请日：2008-03-25

Applicant: INTEL CORPORATION ,  GUERON, Shay ,  FEGHALI, Wajdi, K. ,  GOPAL, Vinodh ,  RAGHUNANDAN, Makaram ,  DIXON, Martin, G. ,  CHENNUPATY, Srinivas ,  KOUNAVIS, Michael, E.

Inventor： GUERON, Shay ,  FEGHALI, Wajdi, K. ,  GOPAL, Vinodh ,  RAGHUNANDAN, Makaram ,  DIXON, Martin, G. ,  CHENNUPATY, Srinivas ,  KOUNAVIS, Michael, E.

IPC: H04L9/10 ,  H04L9/08

CPC classification number: H04L9/0631 ,  G06F3/0623 ,  G06F3/0665 ,  G06F3/0689 ,  G06F9/30007 ,  G06F9/30036 ,  G06F9/30047 ,  G06F9/30145 ,  G06F9/30178 ,  G06F9/3802 ,  G06F9/3818 ,  G06F9/3887 ,  G06F9/3895 ,  G06F12/0862 ,  G06F12/0875 ,  G06F12/1408 ,  G06F21/602 ,  G06F2212/1052 ,  G06F2212/402 ,  G06F2212/452 ,  G06F2212/454 ,  G06F2212/602 ,  G11C7/1072 ,  H04L9/0816 ,  H04L9/0861 ,  H04L2209/12 ,  H04L2209/24

Abstract: A flexible aes instruction set for a general purpose processor is provided. The instruction set includes instructions to perform a "one round" pass for aes encryption or decryption and also includes instructions to perform key generation. An immediate may be used to indicate round number and key size for key generation for 128/192/256 bit keys. The flexible aes instruction set enables full use of pipelining capabilities because it does not require tracking of implicit registers.

Abstract translation: 提供了一种用于通用处理器的灵活的指令集。 指令集包括对aes加密或解密执行“一轮”通行的指令，还包括执行密钥生成的指令。 立即可以用于指示128/192/256位键的密钥生成的循环数和密钥大小。 灵活的aes指令集可以充分利用流水线功能，因为它不需要跟踪隐式寄存器。

公开(公告)号：WO2007078672A3

公开(公告)日：2007-09-13

申请号：PCT/US2006047234

申请日：2006-12-07

Applicant: INTEL CORP ,  KING STEVEN R ,  BERRY FRANK ,  KOUNAVIS MICHAEL E

Inventor： KING STEVEN R ,  BERRY FRANK ,  KOUNAVIS MICHAEL E

IPC: G06F11/10

CPC classification number: G06F11/1004 ,  G06F9/30003 ,  G06F9/30018 ,  G06F9/30032 ,  G06F15/76 ,  G06T1/20 ,  H03M13/00 ,  H03M13/09 ,  H03M13/093 ,  H03M13/096 ,  H03M13/157

Abstract: In one embodiment, the present invention includes a method for receiving incoming data in a processor and performing a checksum operation on the incoming data in the processor pursuant to a user-level instruction for the checksum operation. For example, a cyclic redundancy checksum may be computed in the processor itself responsive to the user-level instruction. Other embodiments are described and claimed.

Abstract translation: 在一个实施例中，本发明包括一种用于在处理器中接收输入数据并根据用于校验和操作的用户级指令对处理器中的输入数据执行校验和操作的方法。 例如，响应于用户级指令，可以在处理器本身中计算循环冗余校验和。 描述和要求保护其他实施例。