公开(公告)号：WO03048943A2

公开(公告)日：2003-06-12

申请号：PCT/DE0204066

申请日：2002-10-31

Applicant: INFINEON TECHNOLOGIES AG ,  GAMMEL BERNDT M ,  KUENEMUND THOMAS ,  SEDLAK HOLGER

Inventor： GAMMEL BERNDT M ,  KUENEMUND THOMAS ,  SEDLAK HOLGER

IPC: G06F12/0804 ,  G06F12/14 ,  G06F21/24 ,  H04L9/10 ,  G06F1/00 ,  G06F12/08

CPC classification number: G06F12/1408 ,  G06F12/0804

Abstract: The invention relates to a memory, especially a cache memory, and a method for synchronising said cache memory with the main memory of a computer. According to the inventive method, each memory entry has an address range, a data area which is associated with the address range, and an identification area which is associated with the address range. Said identification area has a first memory field containing a value which indicates whether data is stored in the data area of the memory or with which cryptographic key. The information contained in the first memory field can be used as a starting point for synchronisation, on the basis of an accepted association between the data to be synchronised and the cryptographic keys.

Abstract translation: 本发明提出一种存储器，特别是高速缓冲存储器，和同步高速缓冲存储器的计算机系统的主存储器的一种方法，其中具有地址范围内的每个存储条目，所分配的地址范围的数据区，和与所述地址空间标识符字段相关联。 在这种情况下的识别区包括第一存储器阵列包括一个值，指示加密密钥数据是否与存储在存储器中的数据区域。 由于推定数据和加密密钥同步之间的关联，包含在第一存储器字段中的信息可以作为同步的基准。