公开(公告)号：US4914654A

公开(公告)日：1990-04-03

申请号：US177497

申请日：1988-04-04

Applicant: Yutaka Matsuda ,  Teruhisa Inoue ,  Kyousuke Hashimoto ,  Kiyoshi Inoue ,  Yusaku Himono

Inventor： Yutaka Matsuda ,  Teruhisa Inoue ,  Kyousuke Hashimoto ,  Kiyoshi Inoue ,  Yusaku Himono

IPC: H04L1/00 ,  H04L1/16 ,  H04L12/413

CPC classification number: H04L1/1664 ,  H04L1/0083 ,  H04L12/4135 ,  H04L2001/0094 ,  H04L2012/40273

Abstract: A multiplex transmission system, in which one of a plurality of nodes, as a transmission node, mutually coupled together through a transmission path transmits data frame by frame to at least one of other nodes as at least one of reception node, and the reception node returns a reception acknowledge signal to the transmitting node upon proper reception of the frame of data. A reception acknowledge signal area comprising a plurality of bits is provided following the frame transmitted from the transmitting node. The reception acknowledge signal area is divided into a plurality of bit areas which are respectively assigned to the plurality of nodes. The reception node returns the reception acknowlege signal to the transmitting node from the respectively-assigned bit areas of the reception acknowledge signal area. As desired, a destination designation area having the same length as the reception acknowledge signal area is provided in a frame and is divided into a plurality of bit areas which are respectively assigned with the plurality of nodes. The individual destination nodes are specified by the respective bit areas of the destination designation area of the frame. Preferably, a pulse width modulation code for discriminating the binary logic based on the size of the pulse width is used as a transmission code at least in the reception acknowledge signal area.