METHOD AND APPARATUS FOR MEASURING WAFER BIAS POTENTIAL
    1.
    发明申请
    METHOD AND APPARATUS FOR MEASURING WAFER BIAS POTENTIAL 审中-公开
    测量晶片偏置电位的方法和装置

    公开(公告)号:WO2011021160A3

    公开(公告)日:2011-08-11

    申请号:PCT/IB2010053735

    申请日:2010-08-18

    CPC classification number: H01J37/32642 H01J37/32935

    Abstract: A device for use in a wafer processing chamber having a plasma forming volume and a hot edge ring. The hot edge ring has a first surface and a second surface. The first surface is in contact with the plasma forming volume. The second surface is not in contact with the plasma forming volume. The device includes a detector operable to contact the second surface of the hot edge ring. The detector can detect a parameter of the hot edge ring and can provide a detected signal based on the detected parameter.

    Abstract translation: 一种用于具有等离子体形成体积和热边缘环的晶片处理室中的装置。 热边缘环具有第一表面和第二表面。 第一表面与等离子体形成体积接触。 第二表面不与等离子体形成体积接触。 该装置包括可操作以接触热边缘环的第二表面的检测器。 检测器可以检测热边缘环的参数并且可以基于检测到的参数提供检测到的信号。

    METHOD FOR USING AN RC CIRCUIT TO MODEL TRAPPED CHARGE IN AN ELECTROSTATIC CHUCK
    2.
    发明申请
    METHOD FOR USING AN RC CIRCUIT TO MODEL TRAPPED CHARGE IN AN ELECTROSTATIC CHUCK 审中-公开
    使用RC电路在静电卡盘中对TRAPPED充电进行模拟的方法

    公开(公告)号:WO2009078949A2

    公开(公告)日:2009-06-25

    申请号:PCT/US2008/013635

    申请日:2008-12-12

    CPC classification number: H02N13/00 H01L21/6833

    Abstract: A method for simulating the effect of trapped charge in an electrostatic chuck on the chuck performance comprises creating a trapped-charge electrical model having a trapped-charge capacitor and a gap-trapped resistor, and coupling the model to a plurality of voltage sources. The trapped-charge capacitor and the gap-trapped resistor may be varied in relation to a plurality of electrostatic chuck physical parameters.

    Abstract translation: 用于模拟静电卡盘中俘获电荷对卡盘性能的影响的方法包括产生具有俘获电荷电容器和间隙俘获电阻器的俘获电荷电模型,并将该模型耦合到多个电压源。 捕获电荷电容器和间隙捕获的电阻器可以相对于多个静电卡盘物理参数而变化。

    ELECTROSTATIC CHUCK HAVING REDUCED POWER LOSS
    3.
    发明申请
    ELECTROSTATIC CHUCK HAVING REDUCED POWER LOSS 审中-公开
    具有减少功率损耗的静电卡盘

    公开(公告)号:WO2013162792A1

    公开(公告)日:2013-10-31

    申请号:PCT/US2013/033001

    申请日:2013-03-19

    Abstract: Embodiments of the invention generally relate to an electrostatic chuck having reduced power loss, and methods and apparatus for reducing power loss in an electrostatic chuck, as well as methods for testing and manufacture thereof. In one embodiment, an electrostatic chuck is provided. The electrostatic chuck includes a conductive base, and a ceramic body disposed on the conductive base, the ceramic body comprising an electrode and one or more heating elements embedded therein, wherein the ceramic body comprises a dissipation factor of about 0.11 to about 0.16 and a capacitance of about 750 picoFarads to about 950 picoFarads between the electrode and the one or more heating elements.

    Abstract translation: 本发明的实施例一般涉及具有降低的功率损耗的静电卡盘,以及用于减少静电卡盘中的功率损耗的方法和装置,以及用于其的测试和制造方法。 在一个实施例中,提供静电卡盘。 静电卡盘包括导电基体和布置在导电基底上的陶瓷体,陶瓷体包括电极和嵌入其中的一个或多个加热元件,其中陶瓷体包括约0.11至约0.16的损耗因数和电容 在电极和一个或多个加热元件之间约750皮微米至约950皮克级。

    METHOD FOR USING AN RC CIRCUIT TO MODEL TRAPPED CHARGE IN AN ELECTROSTATIC CHUCK
    4.
    发明申请
    METHOD FOR USING AN RC CIRCUIT TO MODEL TRAPPED CHARGE IN AN ELECTROSTATIC CHUCK 审中-公开
    使用RC电路模拟静电卡盘中的陷阱电荷的方法

    公开(公告)号:WO2009078949A3

    公开(公告)日:2009-10-01

    申请号:PCT/US2008013635

    申请日:2008-12-12

    CPC classification number: H02N13/00 H01L21/6833

    Abstract: A method for simulating the effect of trapped charge in an electrostatic chuck on the chuck performance comprises creating a trapped-charge electrical model having a trapped-charge capacitor and a gap-trapped resistor, and coupling the model to a plurality of voltage sources. The trapped-charge capacitor and the gap-trapped resistor may be varied in relation to a plurality of electrostatic chuck physical parameters.

    Abstract translation: 用于模拟静电卡盘中的俘获电荷对卡盘性能的影响的方法包括创建具有俘获电荷电容器和间隙俘获电阻器的俘获电荷电模型,并将该模型耦合到多个电压源。 俘获电荷电容器和间隙俘获电阻器可以相对于多个静电吸盘物理参数而变化。

    METHODS AND ARRANGEMENT FOR PLASMA DECHUCK OPTIMIZATION BASED ON COUPLING OF PLASMA SIGNALING TO SUBSTRATE POSITION AND POTENTIAL
    5.
    发明申请
    METHODS AND ARRANGEMENT FOR PLASMA DECHUCK OPTIMIZATION BASED ON COUPLING OF PLASMA SIGNALING TO SUBSTRATE POSITION AND POTENTIAL 审中-公开
    基于等离子体信号耦合到基底位置和潜力的等离子体去离子优化的方法和装置

    公开(公告)号:WO2011031590A3

    公开(公告)日:2011-06-30

    申请号:PCT/US2010047382

    申请日:2010-08-31

    CPC classification number: H01L21/6833 H01J37/32091 H01J37/32935

    Abstract: A method for optimizing a dechuck sequence, which includes removing a substrate from a lower electrode. The method includes performing an initial analysis to determine if a first set of electrical characteristic data of a plasma formed during the dechuck sequence traverses a threshold values. If so, turning off the inert gas. The method also includes raising the lifter pins slightly from the lower electrode to move the substrate in an upward direction. The method further includes performing a mechanical and electrical analysis, which includes comparing a first set of mechanical data, which includes an amount of force exerted by the lifter pins, against a threshold value. The mechanical and electrical analysis also includes comparing a second set of electrical characteristic data against a threshold value. If both traverse the respective threshold value, removes the substrate from the lower electrode since a substrate-released event has occurred.

    Abstract translation: 一种用于优化解扣序列的方法,其包括从下电极去除衬底。 该方法包括执行初始分析以确定在解扣序列期间形成的等离子体的第一组电特性数据是否穿过阈值。 如果是这样,关闭惰性气体。 该方法还包括从下电极稍微升高升降器销,以向上移动基板。 该方法还包括执行机械和电气分析,其包括将包括提升器引脚施加的力的第一组机械数据与阈值进行比较。 机械和电气分析还包括将第二组电特性数据与阈值进行比较。 如果两者都穿过相应的阈值,则由于发生了衬底释放事件而从底部电极去除衬底。

    METHODS AND ARRANGEMENT FOR PLASMA DECHUCK OPTIMIZATION BASED ON COUPLING OF PLASMA SIGNALING TO SUBSTRATE POSITION AND POTENTIAL
    6.
    发明申请
    METHODS AND ARRANGEMENT FOR PLASMA DECHUCK OPTIMIZATION BASED ON COUPLING OF PLASMA SIGNALING TO SUBSTRATE POSITION AND POTENTIAL 审中-公开
    基于等离子体信号耦合基片位置和电位的等离子体衰减优化方法和装置

    公开(公告)号:WO2011031590A2

    公开(公告)日:2011-03-17

    申请号:PCT/US2010/047382

    申请日:2010-08-31

    CPC classification number: H01L21/6833 H01J37/32091 H01J37/32935

    Abstract: A method for optimizing a dechuck sequence, which includes removing a substrate from a lower electrode. The method includes performing an initial analysis to determine if a first set of electrical characteristic data of a plasma formed during the dechuck sequence traverses a threshold values. If so, turning off the inert gas. The method also includes raising the lifter pins slightly from the lower electrode to move the substrate in an upward direction. The method further includes performing a mechanical and electrical analysis, which includes comparing a first set of mechanical data, which includes an amount of force exerted by the lifter pins, against a threshold value. The mechanical and electrical analysis also includes comparing a second set of electrical characteristic data against a threshold value. If both traverse the respective threshold value, removes the substrate from the lower electrode since a substrate-released event has occurred.

    Abstract translation: 用于优化去偏移序列的方法,其包括从下电极移除衬底。 该方法包括执行初始分析以确定在去偏移序列期间形成的等离子体的第一组电特性数据是否穿过阈值。 如果是这样,关闭惰性气体。 该方法还包括从下部电极稍微提升升降销以使基板向上移动。 该方法还包括执行机械和电气分析,其包括将第一组机械数据与阈值进行比较,所述第一组机械数据包括由所述提升销施加的力的量。 机械和电气分析还包括将第二组电特性数据与阈值进行比较。 如果两者都横跨相应的阈值,则由于发生衬底释放事件而从下电极移除衬底。

    HIGH TEMPERATURE ELECTROSTATIC CHUCK WITH REAL-TIME HEAT ZONE REGULATING CAPABILITY
    7.
    发明申请
    HIGH TEMPERATURE ELECTROSTATIC CHUCK WITH REAL-TIME HEAT ZONE REGULATING CAPABILITY 审中-公开
    具有实时热区调节能力的高温静电卡盘

    公开(公告)号:WO2013162820A1

    公开(公告)日:2013-10-31

    申请号:PCT/US2013/034380

    申请日:2013-03-28

    Abstract: Embodiments of the present invention provide electrostatic chucks for operating at elevated temperatures. One embodiment of the present invention provides a dielectric chuck body for an electrostatic chuck. The dielectric chuck body includes a substrate supporting plate having a top surface for receiving a substrate and a back surface opposing the top surface, an electrode embedded in the substrate supporting plate, and a shaft having a first end attached to the back surface of the substrate supporting plate and a second end opposing the first end. The second end is configured to contact a cooling base and provide temperature control to the substrate supporting plate. The shaft is hollow having a sidewall enclosing a central opening, and two or more channels formed through the sidewall and extending from the first end to the second end.

    Abstract translation: 本发明的实施例提供了用于在升高的温度下操作的静电卡盘。 本发明的一个实施例提供了一种用于静电卡盘的电介质卡盘体。 电介质卡盘体包括:基板支撑板,具有用于接收基板的顶表面和与顶表面相对的后表面,嵌入在基板支撑板中的电极;以及轴,其具有附接到基板的背面的第一端 支撑板和与第一端相对的第二端。 第二端构造成接触冷却基座并且向基板支撑板提供温度控制。 轴是中空的,具有封闭中心开口的侧壁,以及穿过侧壁形成并从第一端延伸到第二端的两个或更多个通道。

    METHOD AND APPARATUS FOR MEASURING WAFER BIAS POTENTIAL
    8.
    发明申请
    METHOD AND APPARATUS FOR MEASURING WAFER BIAS POTENTIAL 审中-公开
    测量水平偏移的方法和装置

    公开(公告)号:WO2011021160A2

    公开(公告)日:2011-02-24

    申请号:PCT/IB2010/053735

    申请日:2010-08-18

    CPC classification number: H01J37/32642 H01J37/32935

    Abstract: A device for use in a wafer processing chamber having a plasma forming volume and a hot edge ring. The hot edge ring has a first surface and a second surface. The first surface is in contact with the plasma forming volume. The second surface is not in contact with the plasma forming volume. The device includes a detector operable to contact the second surface of the hot edge ring. The detector can detect a parameter of the hot edge ring and can provide a detected signal based on the detected parameter.

    Abstract translation: 一种用于具有等离子体形成体积和热边缘环的晶片处理室中的装置。 热边缘环具有第一表面和第二表面。 第一表面与等离子体形成体积接触。 第二表面不与等离子体形成体积接触。 该装置包括可操作以接触热边缘环的第二表面的检测器。 检测器可以检测热边缘环的参数,并可以根据检测到的参数提供检测信号。

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