公开(公告)号：US08803091B2

公开(公告)日：2014-08-12

申请号：US12979009

申请日：2010-12-27

Applicant: Mitsuhiro Yamamura

Inventor： Mitsuhiro Yamamura

IPC: G01J5/34

CPC classification number: G01J5/34 ,  G01J1/46

Abstract: A detection circuit includes a current mirror circuit, a pyroelectric element, a capacitor element and a charging circuit. The pyroelectric element is disposed between a first power supply node and a first node connected to the current mirror circuit. The capacitor element is disposed between the first power supply node and a second node connected to the current mirror circuit. The charging circuit is connected to the current mirror circuit to charge the pyroelectric element and the capacitor element though the current mirror circuit.

Abstract translation: 检测电路包括电流镜电路，热电元件，电容器元件和充电电路。 热电元件设置在第一电源节点和连接到电流镜电路的第一节点之间。 电容器元件设置在第一电源节点和连接到电流镜电路的第二节点之间。 充电电路连接到电流镜电路，以通过电流镜电路对热电元件​​和电容器元件充电。

公开(公告)号：US08569698B2

公开(公告)日：2013-10-29

申请号：US13186775

申请日：2011-07-20

Applicant: Jun Takizawa ,  Takafumi Noda ,  Taketomi Kamikawa ,  Mitsuhiro Yamamura

Inventor： Jun Takizawa ,  Takafumi Noda ,  Taketomi Kamikawa ,  Mitsuhiro Yamamura

IPC: G01J5/00

CPC classification number: G01J5/10 ,  G01J5/08 ,  G01J5/0853 ,  G01J5/34

Abstract: A thermal detector has a thermal detection element in which a physical characteristic changes based on temperature, a light-absorbing member configured and arranged to collect heat and transmit collected heat to the thermal detection element, a support member mounting the thermal detection element on a first side with a second surface facing a cavity, and a support part supporting a portion of the support member. The light-absorbing member is a plate shaped member at least partially contacting a top part of the thermal detection element and having a portion overhanging to an outside from the top part of the thermal detection element in plan view.

Abstract translation: 热检测器具有物理特性基于温度而变化的热检测元件，构造并布置成收集热量并将收集的热量传递到热检测元件的光吸收构件;将热检测元件安装在第一 侧面具有面向空腔的第二表面和支撑所述支撑构件的一部分的支撑部分。 光吸收构件是平板状的板状构件，其至少部分地接触热检测元件的顶部并具有从热检测元件的顶部向外伸出的部分。

公开(公告)号：US20120018635A1

公开(公告)日：2012-01-26

申请号：US13186775

申请日：2011-07-20

Applicant: Jun TAKIZAWA ,  Takafumi NODA ,  Taketomi KAMIKAWA ,  Mitsuhiro YAMAMURA

Inventor： Jun TAKIZAWA ,  Takafumi NODA ,  Taketomi KAMIKAWA ,  Mitsuhiro YAMAMURA

IPC: G01J5/02

CPC classification number: G01J5/10 ,  G01J5/08 ,  G01J5/0853 ,  G01J5/34

Abstract: A thermal detector has a thermal detection element in which a physical characteristic changes based on temperature, a light-absorbing member configured and arranged to collect heat and transmit collected heat to the thermal detection element, a support member mounting the thermal detection element on a first side with a second surface facing a cavity, and a support part supporting a portion of the support member. The light-absorbing member is a plate shaped member at least partially contacting a top part of the thermal detection element and having a portion overhanging to an outside from the top part of the thermal detection element in plan view.

Abstract translation: 热检测器具有物理特性基于温度而变化的热检测元件，构造并布置成收集热量并将收集的热量传递到热检测元件的光吸收构件;将热检测元件安装在第一 侧面具有面向空腔的第二表面和支撑所述支撑构件的一部分的支撑部分。 光吸收构件是平板状的板状构件，其至少部分地接触热检测元件的顶部并具有从热检测元件的顶部向外伸出的部分。

公开(公告)号：US07724561B2

公开(公告)日：2010-05-25

申请号：US11862225

申请日：2007-09-27

Applicant: Mitsuhiro Yamamura

Inventor： Mitsuhiro Yamamura

IPC: G11C11/22

CPC classification number: G11C11/22

Abstract: A ferroelectric memory device includes: a plurality of bit lines; a plurality of memory cells connected to each of the plurality of bit lines, and each storing “0” data with a smaller amount of readout charge or “1” data with a greater amount of readout charge according to a polarization state; a plurality of data lines; a plurality of charge transfer circuits that connect the plurality of bit lines to the plurality of data lines, respectively, based on a potential on each of the bit lines; a capacitor connected to each of the plurality of data lines for storing negative charge; a positive charge canceling circuit that pulls out positive charge corresponding to the amount of “0” data readout charge from each of the plurality of bit lines; and a sense amplifier that judges data read out from the memory cells.

Abstract translation: 铁电存储器件包括：多个位线; 连接到多个位线中的每一个的多个存储单元，并且每个存储具有较小读出电荷量的“0”数据或根据极化状态具有较大读出电荷量的“1”数据; 多条数据线; 多个电荷转移电路，其分别基于每个位线上的电位将多个位线连接到所述多条数据线; 连接到所述多条数据线中的每一条线上以存储负电荷的电容器; 正电荷消除电路，其从与所述多个位线中的每一个位线相对应的“0”数据读出电荷的量抽出正电荷; 以及读出放大器，其判断从存储器单元读出的数据。

公开(公告)号：US07203128B2

公开(公告)日：2007-04-10

申请号：US11170682

申请日：2005-06-29

Applicant: Mitsuhiro Yamamura

Inventor： Mitsuhiro Yamamura

IPC: G11C8/18

CPC classification number: G11C11/22

Abstract: A ferroelectric memory device characterized in comprising: a voltage source for generating a predetermined voltage; a first bit line and a second bit line; a first ferroelectric capacitor having one end electrically connected to the first bit line; a first resistance provided between the first bit line and the voltage source; a second ferroelectric capacitor having one end electrically connected to the second bit line; a second resistance provided between the second bit line and the voltage source; and a sense amplifier that judges data written in the first ferroelectric capacitor based on a potential on the first bit line, according to a timing at which a potential on the second bit line changes when the predetermined voltage is supplied to the first bit line and the second bit line.

Abstract translation: 一种铁电存储器件，其特征在于包括：用于产生预定电压的电压源; 第一位线和第二位线; 第一铁电电容器，其一端电连接到第一位线; 提供在第一位线和电压源之间的第一电阻; 第二铁电电容器，其一端电连接到第二位线; 设置在第二位线和电压源之间的第二电阻; 以及读出放大器，其根据第一位线上的电位根据第一位线上的电位变化时的定时，基于第一位线上的电位来判定写入第一铁电电容器的数据， 第二位线。

公开(公告)号：US07203103B2

公开(公告)日：2007-04-10

申请号：US11170671

申请日：2005-06-29

Applicant: Mitsuhiro Yamamura

Inventor： Mitsuhiro Yamamura

IPC: G11C7/06

CPC classification number: G11C11/22

Abstract: A ferroelectric memory device equipped with: a voltage source for generating a predetermined voltage; a first ferroelectric capacitor having one end electrically connected to a first bit line; a first resistance having a first resistance value, provided between the first bit line and the voltage source; a second ferroelectric capacitor having one end electrically connected to a second bit line; a second resistance having a second resistance value different from the first resistance value, provided between the second bit line and the voltage source; and a sense amplifier that judges data written in the first ferroelectric capacitor by comparing a potential on the first bit line with a potential on the second bit line when the predetermined voltage is supplied to the first bit line and the second bit line.

Abstract translation: 一种铁电存储装置，配备有用于产生预定电压的电压源; 第一铁电电容器，其一端电连接到第一位线; 具有第一电阻值的第一电阻，设置在第一位线和电压源之间; 第二铁电电容器，其一端电连接到第二位线; 设置在所述第二位线和所述电压源之间的具有与所述第一电阻值不同的第二电阻值的第二电阻; 以及读出放大器，当所述预定电压被提供给所述第一位线和所述第二位线时，通过将所述第一位线上的电位与所述第二位线上的电位进行比较来判断写入所述第一铁电电容器中的数据。

公开(公告)号：US07200026B2

公开(公告)日：2007-04-03

申请号：US10980979

申请日：2004-11-04

Applicant: Mitsuhiro Yamamura

Inventor： Mitsuhiro Yamamura

IPC: G11C11/22

CPC classification number: G11C5/14 ,  G11C11/22

Abstract: A ferroelectric memory is provided including a ferroelectric capacitor having an end electrically coupled to a bit line; a power source generating a predetermined voltage; a resistance formed between the bit line and the power source; and a switch installed in series with the resistor, and switching whether a predetermined voltage is applied to the bit line via the resistor or not. The voltage source preferably generates a driving voltage driving the ferroelectric memory, a voltage between the resistive voltage of the ferroelectric capacitor and the driving voltage driving the ferroelectric memory, or a voltage that is less than the coercive voltage of the ferroelectric capacitor.

Abstract translation: 提供一种铁电存储器，其包括具有电耦合到位线的端部的铁电电容器; 产生预定电压的电源; 在位线和电源之间形成的电阻; 以及与电阻器串联安装的开关，并且切换是否通过电阻器将预定电压施加到位线。 电压源优选地产生驱动铁电存储器的驱动电压，强电介质电容器的电阻电压和驱动铁电存储器的驱动电压之间的电压或小于铁电电容器的矫顽电压的电压。

公开(公告)号：US20050157532A1

公开(公告)日：2005-07-21

申请号：US11022371

申请日：2004-12-23

Applicant: Mitsuhiro Yamamura

Inventor： Mitsuhiro Yamamura

IPC: G11C11/22

CPC classification number: G11C11/22

Abstract: A ferroelectric memory device that is equipped with a cell array provided with a plurality of memory cells each having a first ferroelectric capacitor and a second ferroelectric capacitor that are connected to each other in series, a memory cell selection section that selects a specified one of the plurality of memory cells, a potential difference generation section that gives a potential difference across one end and another end of the selected memory cell, and a judging section that judges memory data stored in the memory cell based on a potential at a connection node between the first ferroelectric capacitor and the second ferroelectric capacitor when the potential difference is given to the memory cell.

Abstract translation: 一种铁电体存储器件，其具有设置有多个存储单元的单元阵列，所述多个存储单元具有彼此串联连接的第一铁电电容器和第二铁电电容器;存储单元选择单元，其选择 多个存储单元，电位差产生部，其在所选择的存储单元的一端和另一端上赋予电位差;判断部，其基于所述存储单元中的连接节点的电位来判断存储在所述存储单元中的存储器数据 当电位差给予存储单元时，第一铁电电容器和第二铁电电容器。

公开(公告)号：US20050002216A1

公开(公告)日：2005-01-06

申请号：US10822807

申请日：2004-04-13

Applicant: Kenya Watanabe ,  Mitsuhiro Yamamura

Inventor： Kenya Watanabe ,  Mitsuhiro Yamamura

IPC: G11C11/22

CPC classification number: G11C11/22

Abstract: A ferroelectric memory device, in which wordlines and bitlines are hierarchized and influence of disturbance-noise is reduced, includes: first sub-wordline select switches, each of which are disposed between one of the main-wordlines and one end of one of the sub-wordlines provided for the one main-wordline; first sub-bitline select switches, each of which are disposed between one of the main-bitlines and one end of one of the sub-bitlines provided for the one main-bitline; second sub-wordline select switches, each of which are disposed between the other end of one of the sub-wordlines and the unselected wordline potential supply line; and second sub-bitline select switches, each of which are disposed between the other end of one of the sub-bitlines and the unselected bitline potential supply line, each of the first and second sub-wordline select switches and first and second sub-bitline select switches being driven independently at least in one of the sector regions.

公开(公告)号：US20110182321A1

公开(公告)日：2011-07-28

申请号：US13013064

申请日：2011-01-25

Applicant: Kei YOSHIZAKI ,  Mitsuhiro YAMAMURA

Inventor： Kei YOSHIZAKI ,  Mitsuhiro YAMAMURA

IPC: G01J5/00 ,  H01L35/00

CPC classification number: G01J5/34 ,  G01J5/22 ,  G01J2005/345

Abstract: A detection circuit for a heat sensor includes a charge circuit provided between a second power supply node and a detection node of a heat sensing element, and a discharge circuit provided between the detection node and a first power supply node. The discharge circuit has a discharge resistance element and a discharge transistor provided in series between the detection node and the first power supply node.

Abstract translation: 用于热传感器的检测电路包括设置在第二电源节点和热传感元件的检测节点之间的充电电路，以及设置在检测节点和第一电源节点之间的放电电路。 放电电路具有在检测节点和第一电源节点之间串联设置的放电电阻元件和放电晶体管。