公开(公告)号：WO2008127268A3

公开(公告)日：2008-12-24

申请号：PCT/US2007017865

申请日：2007-08-13

Applicant: GCT SEMICONDUCTOR INC ,  PARK JOONBAE ,  LEE KYEONGHO ,  KOO YIDO ,  LEE JEONG WOO

Inventor： PARK JOONBAE ,  LEE KYEONGHO ,  KOO YIDO ,  LEE JEONG WOO

IPC: H04B1/38

CPC classification number: H04B1/1607

Abstract: Embodiments of an RFIC and methods for same and mobile terminals can internally reduce an input voltage to provide a prescribed voltage to a radio frequency transceiver. Embodiments of an RFIC can have a high efficiency and/or a low noise. In one embodiment, a device can include a PMIC and an RFIC. The RFIC can include an RF transceiver to carry out an RF transmission and an RF reception, a DC-DC converter to lower a voltage provided by the PMIC, and an LDO regulator to regulate the lowered voltage to a fixed voltage used by the RF transceiver.

Abstract translation: RFIC的实施例以及用于相同和移动终端的方法可以在内部减小输入电压以向射频收发器提供规定的电压。 RFIC的实施例可以具有高效率和/或低噪声。 在一个实施例中，设备可以包括PMIC和RFIC。 RFIC可以包括用于执行RF传输和RF接收的RF收发器，用于降低由PMIC提供的电压的DC-DC转换器以及用于将降低的电压调节到由RF收发器使用的固定电压的LDO调节器 。

公开(公告)号：WO2008103860A1

公开(公告)日：2008-08-28

申请号：PCT/US2008/054629

申请日：2008-02-21

Applicant: GCT SEMICONDUCTOR, INC. ,  LEE, Kyeongho ,  PARK, Joonbae ,  LEE, Jeong-woo ,  LEE, Seung-wook ,  LEE, Eal Wan

Inventor： LEE, Kyeongho ,  PARK, Joonbae ,  LEE, Jeong-woo ,  LEE, Seung-wook ,  LEE, Eal Wan

IPC: H04J15/00 ,  H04J11/00 ,  H04B7/04 ,  H04B7/08

CPC classification number: H04L27/0014 ,  H04L2027/0016 ,  H04L2027/0018 ,  H04L2027/0024

Abstract: The present invention relates to an apparatus and a method for measuring an IQ imbalance. One embodiment according to the present general inventive concept can provide a method for measuring a Tx IQ imbalance generated in an IQ up-conversion mixer and an Rx IQ imbalance generated in an IQ down-conversion mixer, that includes measuring a first IQ imbalance corresponding to a first combination of the Rx IQ imbalance with the Tx IQ imbalance, measuring a second IQ imbalance corresponding to a second combination of the the Rx IQ imbalance with the Tx IQ imbalance and obtaining the Tx IQ imbalance and the Rx IQ imbalance from the first IQ imbalance and the second IQ imbalance.

Abstract translation: 本发明涉及一种用于测量IQ不平衡的装置和方法。 根据本发明总体构思的一个实施例可以提供一种用于测量在IQ上变频混频器中产生的Tx IQ不平衡和在IQ下变频混频器中产生的Rx IQ不平衡的方法，其包括测量对应于 Rx IQ不平衡与Tx IQ不平衡的第一组合，测量对应于Rx IQ不平衡与Tx IQ不平衡的第二组合的第二IQ不平衡，并从第一IQ获得Tx IQ不平衡和Rx IQ不平衡 不平衡和第二智商失衡。

公开(公告)号：WO2008005421A2

公开(公告)日：2008-01-10

申请号：PCT/US2007015333

申请日：2007-07-02

Applicant: GCT SEMICONDUCTOR INC ,  PARK JOONBAE ,  LEE KYEONGHO ,  JUNG SAN HUNG ,  LEE EAL WAN ,  SONG IN HO

Inventor： PARK JOONBAE ,  LEE KYEONGHO ,  JUNG SAN HUNG ,  LEE EAL WAN ,  SONG IN HO

IPC: H04J1/04

CPC classification number: H04L27/0014 ,  H04L2027/0016 ,  H04L2027/0022

Abstract: The application discloses embodiments of methods and/or systems for compensating a transmission carrier leakage of an up-conversion mixer, a tranceiving circuit or apparatus embodying the same. One embodiment of a method can include detecting an I channel DC offset DCI 0 and a Q channel DC offset DCQ 0 generated by a reception carrier leakage from an output of a down-conversion mixer, detecting an I channel DC offset DCI and a Q channel DC offset DCQ from the output of the down conversion mixer while varying a compensation parameter being inputted to an up conversion mixer that has its output coupled to an input of the down-conversion mixer to determine the compensation parameter that can reduce or minimize a transmission carrier leakage. A combination of a transmission baseband signal and the determined compensation parameter can be transmitted using the up-conversion mixer and an antenna to compensate for the transmission carrier leakage.

Abstract translation: 本申请公开了用于补偿上变频混频器，引入电路或体现其的转换混频器的传输载波泄漏的方法和/或系统的实施例。 方法的一个实施例可以包括从下行链路的输出检测由接收载波泄漏产生的I信道DC偏移DCI 0和Q信道DC偏移DCQ <0> 转换混频器，从下变频混频器的输出检测I信道DC偏移DCI和Q信道DC偏移DCQ，同时改变输入到上变频混频器的补偿参数，该上变频混频器的输出耦合到下转换的输入 混频器确定可以减少或最小化传输载波泄漏的补偿参数。 传输基带信号和所确定的补偿参数的组合可以使用上变频混频器和天线来传输，以补偿传输载波泄漏。

公开(公告)号：WO2005022933A2

公开(公告)日：2005-03-10

申请号：PCT/US2004/027799

申请日：2004-08-27

Applicant: GCT SEMICONDUCTOR, INC. ,  JEON, Young-Deuk ,  LEE, Seung-Wook ,  LEE, Jeong-Woo ,  PARK, Joonbae ,  LEE, Kyeongho

Inventor： JEON, Young-Deuk ,  LEE, Seung-Wook ,  LEE, Jeong-Woo ,  PARK, Joonbae ,  LEE, Kyeongho

IPC: H04Q

CPC classification number: H04B1/1027 ,  H03H11/1252 ,  H03H11/1291 ,  H03J1/0008 ,  H04B1/44

Abstract: A system and method for filtering signals in a communications system reduces hardware and chip size requirements by selectively connecting a filter along transmitter and receiver paths of a transceiver. In operation, a controller generated signals for connecting the filter along the transmitter path when the transceiver is in transmitter mode and for connecting the filter along the receiver path when the transmitter is in receiver mode. The controller then generates additional signals for setting one or more parameters of the filter based on the path connected, or put differently based on the operational mode of the transceiver. In a variation, the controller sets the parameters of additional elements coupled to the filter as a way of further controlling processing of the transmitter and receiver signals. The system and method are particularly well suited to controlling the filtering of signals at the front-end of the transceiver having a direct-conversion architecture and in general ones performing time-multiplexing applications.

Abstract translation: 用于对通信系统中的信号进行滤波的系统和方法通过沿收发器的发射机和接收机路径选择性地连接滤波器来降低硬件和芯片尺寸的要求。 在操作中，当收发器处于发射机模式时，控制器产生用于沿着发射机路径连接滤波器的信号，并且当发射机处于接收机模式时，控制器沿着接收机路径连接滤波器。 然后，控制器产生附加信号，用于基于连接的路径设置滤波器的一个或多个参数，或者基于收发器的操作模式进行不同的设置。 在一个变型中，控制器设置耦合到滤波器的附加元件的参数作为进一步控制发射机和接收机信号的处理的一种方式。 该系统和方法特别适用于控制在具有直接转换架构的收发器的前端处的信号的滤波，并且通常执行时间复用应用。

公开(公告)号：WO2008127268A2

公开(公告)日：2008-10-23

申请号：PCT/US2007/017865

申请日：2007-08-13

Applicant: GCT SEMICONDUCTOR, INC. ,  PARK, Joonbae ,  LEE, Kyeongho ,  KOO, Yido ,  LEE, Jeong, Woo

Inventor： PARK, Joonbae ,  LEE, Kyeongho ,  KOO, Yido ,  LEE, Jeong, Woo

IPC: H04Q7/22

CPC classification number: H04B1/1607

Abstract: Embodiments of an RFIC and methods for same and mobile terminals can internally reduce an input voltage to provide a prescribed voltage to a radio frequency transceiver. Embodiments of an RFIC can have a high efficiency and/or a low noise. In one embodiment, a device can include a PMIC and an RFIC. The RFIC can include an RF transceiver to carry out an RF transmission and an RF reception, a DC-DC converter to lower a voltage provided by the PMIC, and an LDO regulator to regulate the lowered voltage to a fixed voltage used by the RF transceiver.

Abstract translation: RFIC的实施例和用于相同和移动终端的方法可以在内部减小输入电压以向射频收发器提供规定的电压。 RFIC的实施例可以具有高效率和/或低噪声。 在一个实施例中，设备可以包括PMIC和RFIC。 RFIC可以包括用于执行RF传输和RF接收的RF收发器，用于降低由PMIC提供的电压的DC-DC转换器和LDO调节器，以将降低的电压调节到由RF收发器使用的固定电压 。

公开(公告)号：WO2007109225A3

公开(公告)日：2008-07-24

申请号：PCT/US2007006800

申请日：2007-03-16

Applicant: GCT SEMICONDUCTOR INC ,  PARK JOONBAE ,  LEE KYEONGHO

Inventor： PARK JOONBAE ,  LEE KYEONGHO

IPC: H03L7/06 ,  H03L7/16 ,  H03L7/18

CPC classification number: G06F1/04 ,  H03L7/0816 ,  H03L7/235 ,  H03L2207/10

Abstract: Embodiments of a clock generator and a clock generating method can use a delay locked loop (DLL) In one embodiment, a clock generator can include a first oscillator (XoI) to generate a first clock signal having a frequency corresponding to a control signal, a delay locked loop (100) to generate a second clock signal having a frequency higher than that of the first clock signal, a frequency divider (200) to receive the second clock signal to generate a third clock signal having a frequency lower than that of the second cloc signal, a second oscillator (Xo2) to generate a fourth clock signal and a phase frequency detector (300) to generate the control signal corresponding to a phase difference and/or a frequency difference between the third clock signal and the fourth clock signal

Abstract translation: 时钟发生器和时钟产生方法的实施例可以使用延迟锁定环（DLL）。在一个实施例中，时钟发生器可以包括第一振荡器（XoI），以产生具有对应于控制信号的频率的第一时钟信号， 延迟锁定环路（100）产生频率高于第一时钟信号的频率的第二时钟信号;分频器（200），用于接收第二时钟信号以产生频率低于第一时钟信号频率的第三时钟信号 产生第四时钟信号的第二振荡器（Xo2）和产生与第三时钟信号和第四时钟信号之间的相位差和/或频率差对应的控制信号的相位频率检测器（300）

公开(公告)号：WO2008036389A3

公开(公告)日：2008-03-27

申请号：PCT/US2007/020450

申请日：2007-09-21

Applicant: GCT SEMICONDUCTOR, INC. ,  PARK, Joonbae ,  LEE, Kyeongho ,  KOO, Yido ,  LEE, Jeong-woo

Inventor： PARK, Joonbae ,  LEE, Kyeongho ,  KOO, Yido ,  LEE, Jeong-woo

IPC: H04B1/06 ,  H04B7/00

Abstract: The application discloses system and method embodiments related to a frequency synthesizer. Embodiments of a frequency synthesizer can have a low phase noise and a narrow channel spacing. Embodiments of a frequency synthesizer can use two phase locked loops. One embodiment of a frequency synthesizer can include a reference frequency oscillator for outputting a signal having a reference frequency, an integer-N phase locked loop to generate a first output frequency signal based on the reference frequency signal, a fractional-N phase locked loop to generate a second output frequency based on the reference frequency signal and a circuit to generate an output frequency signal by combining the first output frequency and die second output frequency.

公开(公告)号：WO2007100678A3

公开(公告)日：2008-02-07

申请号：PCT/US2007004755

申请日：2007-02-22

Applicant: GCT SEMICONDUCTOR INC ,  PARK JOONBAE ,  LEE KYEONGHO

Inventor： PARK JOONBAE ,  LEE KYEONGHO

IPC: H01Q11/12

CPC classification number: H01Q21/0025

Abstract: Embodiments of methods, transceiver circuits, and systems can compensate an IQ mismatch (e.g., Tx or Rx) or a carrier leakage using a plurality of local oscillators. One embodiment of a transceiver can include a first up-conversion IQ mixer, a second up-conversion IQ mixer, a first down-conversion IQ mixer with an input to receive an output of the second up-conversion IQ mixer, a second down- conversion IQ mixer with an input to receive an output of the first up-conversion IQ mixer, a first local oscillator to generate a first IQ LO signal for the first up- conversion IQ mixer and the first down-conversion IQ mixer, and a second local oscillator to generate a second IQ LO signal for the second up-conversion IQ mixer and the second down-conversion IQ mixer.

Abstract translation: 方法，收发器电路和系统的实施例可以使用多个本地振荡器补偿IQ失配（例如，Tx或Rx）或载波泄漏。 收发器的一个实施例可以包括第一上变频IQ混频器，第二上变频IQ混频器，具有用于接收第二上变频IQ混频器的输出的输入的第一下变频IQ混频器， 转换IQ混合器，其具有用于接收第一上变频IQ混频器的输出的输入端，第一本地振荡器，用于产生用于第一上变频IQ混频器和第一下变频IQ混频器的第一IQ LO信号，以及第二本地振荡器 本地振荡器产生用于第二上变频IQ混频器和第二下变频IQ混频器的第二IQ LO信号。

公开(公告)号：WO2007100582A3

公开(公告)日：2007-09-07

申请号：PCT/US2007/004500

申请日：2007-02-22

Applicant: GCT SEMICONDUCTOR, INC. ,  PARK, Joonbae ,  LEE, Kyeongho

Inventor： PARK, Joonbae ,  LEE, Kyeongho

IPC: H04N7/173 ,  H04N7/16

Abstract: Embodiments of methods and apparatuses can compensate gain ripple and/or group delay characteristics of at least one filter, a receiving circuit embodying a filter, or a communication system having a wireless terminal embodying the receiving circuit.

公开(公告)号：WO2005086957A3

公开(公告)日：2006-11-09

申请号：PCT/US2005008197

申请日：2005-03-10

Applicant: GCT SEMICONDUCTOR INC ,  PARK JOONBAE ,  LEE SEUNG-WOOK ,  LEE JEONG-WOO ,  LEE KYEONGHO

Inventor： PARK JOONBAE ,  LEE SEUNG-WOOK ,  LEE JEONG-WOO ,  LEE KYEONGHO

IPC: H03F3/45 ,  H03F3/21

CPC classification number: H03F3/211 ,  H03F3/45475 ,  H03F3/45659 ,  H03F2203/45136 ,  H03F2203/45138 ,  H03F2203/45166 ,  H03F2203/45168 ,  H03F2203/45434 ,  H03F2203/45522 ,  H03F2203/45591

Abstract: A variable-gain amplifier circuit uses a pair of single-ended operational amplifiers (100, 110) to amplify complementary portions of a differential input signal (IN, INB). By using two single-ended amplifiers (100, 110) instead of a single differential amplifier, linearity is significantly improved. In addition, common mode feedback circuitry is eliminated along with harmonic distortion and other forms of noise which tend to negative affect the quality of the signal output from the circuit.

Abstract translation: 可变增益放大器电路使用一对单端运算放大器（100,110）来放大差分输入信号（IN，INB）的互补部分。 通过使用两个单端放大器（100,110）代替单个差分放大器，线性度显着提高。 此外，消除共模反馈电路以及谐波失真和其它形式的噪声，这些噪声倾向于负面影响从电路输出的信号的质量。