公开(公告)号：WO2010065505A3

公开(公告)日：2010-06-10

申请号：PCT/US2009/066202

申请日：2009-12-01

Applicant: E. I. DU PONT DE NEMOURS AND COMPANY ,  PRAKASH, Shiva ,  MEINEL, Ines

Inventor： PRAKASH, Shiva ,  MEINEL, Ines

IPC: H01L51/52 ,  H01L51/56 ,  H05B33/26

Abstract: There is provided an anode for an organic electronic device. The anode has (a) a first layer which is a conducting inorganic material and (b) a second ultrathin layer which is a metal oxide.

公开(公告)号：WO2007075560A2

公开(公告)日：2007-07-05

申请号：PCT/US2006048230

申请日：2006-12-18

Applicant: DU PONT ,  PRAKASH SHIVA

Inventor： PRAKASH SHIVA

IPC: H01L23/48 ,  H01J1/62

CPC classification number: H01L51/442 ,  H01L51/5215 ,  H01L51/5281 ,  H01L51/5284 ,  H01L2924/0002 ,  Y02E10/549 ,  H01L2924/00

Abstract: An electronic device or a process of forming an electronic device can include a first electrode configured to achieve low L background or include a black layer. An electronic device can include a substrate including a user surface. The electronic device can also include a first electrode that includes a first layer, a second layer, and a third layer. The second layer can lie between the first and third layers, and the first electrode can be configured to achieve low L background . The electronic device can further include a second electrode lying farther from the user surface as compared to the first electrode. In another embodiment, a first electrode can include a first layer and a second layer. The second layer can set the work function of the electrode, and the second layer can be a black layer. Processes can be used to form the electronic devices.

Abstract translation: 电子设备或形成电子设备的过程可以包括被配置为实现低L背景或包括黑色层的第一电极。 电子设备可以包括包括用户表面的基板。 电子设备还可以包括包括第一层，第二层和第三层的第一电极。 第二层可以位于第一层和第三层之间，并且第一电极可以被配置为实现低L背景。 与第一电极相比，电子器件还可包括位于离用户表面更远的第二电极。 在另一个实施例中，第一电极可以包括第一层和第二层。 第二层可以设置电极的功能，第二层可以是黑色层。 可以使用过程来形成电子设备。

公开(公告)号：WO2006072021A3

公开(公告)日：2006-07-06

申请号：PCT/US2005/047516

申请日：2005-12-29

Applicant: E. I. DU PONT DE NEMOURS AND COMPANY ,  PRAKASH, Shiva

Inventor： PRAKASH, Shiva

IPC: B44C1/22 ,  C03C15/00 ,  C03C25/68 ,  C23F1/00

Abstract: A process for forming an electronic device includes forming a first layer over a substrate, wherein the first layer includes an organic layer, and depositing a second layer over the substrate after forming the first layer, wherein depositing the second layer is performed using ion beam sputtering. In another embodiment, a process for forming an electronic device includes placing a workpiece within a depositing chamber of a depositing apparatus, wherein the workpiece includes a substrate and an organic layer overlying the workpiece. The process includes generating a plasma within a plasma-generating chamber of the depositing apparatus, wherein the plasma is not in direct contact with the workpiece. The process also includes sending an ion beam from the plasma-generating chamber towards a target within the depositing chamber, wherein the target includes a material, and depositing a layer of the material over the organic layer.

公开(公告)号：WO2006072001A2

公开(公告)日：2006-07-06

申请号：PCT/US2005047475

申请日：2005-12-28

Applicant: DU PONT ,  LECLOUX DANIEL DAVID ,  STAINER MATTHEW ,  SMITH ERIC M ,  CHESTERFIELD REID J ,  PRAKASH SHIVA

Inventor： LECLOUX DANIEL DAVID ,  STAINER MATTHEW ,  SMITH ERIC M ,  CHESTERFIELD REID J ,  PRAKASH SHIVA

IPC: A61K31/137

CPC classification number: H01L51/0005 ,  H01L51/0007

Abstract: Compositions are described comprising small molecule active material, polymer, and aprotic solvent, and methods for making the same, as well as devices and sub-assemblies including the same.

Abstract translation: 描述了包含小分子活性材料，聚合物和非质子溶剂的组合物，及其制备方法，以及包括其的装置和子组件。

公开(公告)号：WO2006072022A3

公开(公告)日：2009-05-07

申请号：PCT/US2005047517

申请日：2005-12-29

Applicant: DU PONT ,  PRAKASH SHIVA ,  MACPHERSON CHARLES DOUGLAS ,  SRDANOV GORDANA ,  STAINER MATTHEW ,  YU GANG

Inventor： PRAKASH SHIVA ,  MACPHERSON CHARLES DOUGLAS ,  SRDANOV GORDANA ,  STAINER MATTHEW ,  YU GANG

IPC: H01L21/00 ,  H01L21/20 ,  H01L31/12

CPC classification number: H01L51/0007 ,  H01L27/3211 ,  H01L51/0005 ,  H01L51/0037 ,  H01L51/0039 ,  H01L51/0052 ,  H01L51/56

Abstract: A process for forming an electronic device includes forming a first layer over a substrate and placing a first liquid composition over a first portion of the first layer. The first liquid composition includes at least a first guest material and a first liquid medium. The first liquid composition comes in contact with the first layer and a substantial amount of the first guest material intermixes with the first layer. An electronic device includes a substrate and a continuous first layer overlying the substrate. The continuous layer includes a first portion in which an electronic component lies and a second portion where no electronic component lies. The first portion is at least 30nm thick and includes a first guest material, and the second portion is no more than 40nm thick.

Abstract translation: 一种用于形成电子器件的方法包括在衬底上形成第一层并将第一液体组合物置于第一层的第一部分上。 第一液体组合物包括至少第一客体材料和第一液体介质。 第一液体组合物与第一层接触并且大量的第一客体材料与第一层混合。 电子器件包括衬底和覆盖衬底的连续的第一层。 连续层包括电子部件所在的第一部分和没有电子部件所在的第二部分。 第一部分为至少30nm厚，并且包括第一客体材料，并且第二部分不超过40nm厚。

公开(公告)号：WO2008144461A1

公开(公告)日：2008-11-27

申请号：PCT/US2008/063815

申请日：2008-05-16

Applicant: E. I. DU PONT DE NEMOURS AND COMPANY ,  PRAKASH, Shiva

Inventor： PRAKASH, Shiva

IPC: H01L51/50

CPC classification number: H01L51/5036 ,  H01L51/0035 ,  H01L51/0039 ,  H01L51/0043 ,  H01L51/0058 ,  H01L51/006 ,  H01L51/0084 ,  H01L51/0085 ,  Y10T428/26

Abstract: There is provided a new process for forming a light-emitting diode device having first, second, and third subpixel areas. In the process a hole injection layer is applied over an anode layer. The hole injection material has a conductive polymer and a fluorinated acid polymer. A hole transport layer is applied over the hole injection layer. A first electroluminescent material which is either green or red, is applied to the first subpixel areas. A second electroluminescent material which is either red or green, is applied to the second subpixel areas. A hole-blocking layer is applied overall. A blue electroluminescent material is applied overall, followed by deposition of a cathode. The second electroluminescent material emits a color different from that of the first electroluminescent material.

Abstract translation: 提供了一种用于形成具有第一，第二和第三子像素区域的发光二极管器件的新工艺。 在该过程中，空穴注入层施加在阳极层上。 空穴注入材料具有导电聚合物和氟化酸聚合物。 空穴传输层施加在空穴注入层上。 将绿色或红色的第一电致发光材料施加到第一子像素区域。 红色或绿色的第二电致发光材料被施加到第二子像素区域。 整体应用空穴阻挡层。 整个应用蓝色电致发光材料，随后沉积阴极。 第二电致发光材料发射与第一电致发光材料不同的颜色。

公开(公告)号：WO2006078427A3

公开(公告)日：2006-07-27

申请号：PCT/US2005/047280

申请日：2005-12-29

Applicant: E.I. DUPONT DE NEMOURS AND COMPANY ,  PRAKASH, Shiva ,  TROUNG, Nugent

Inventor： PRAKASH, Shiva ,  TROUNG, Nugent

IPC: H01L51/40

Abstract: In one embodiment, a method for creating a pattern in a layer of an organic electronic device that includes selectively irradiating a portion of the layer is provided, and devices and sub-assemblies made by the same.

公开(公告)号：WO2006078427A2

公开(公告)日：2006-07-27

申请号：PCT/US2005047280

申请日：2005-12-29

Applicant: DU PONT ,  PRAKASH SHIVA ,  TROUNG NUGENT

Inventor： PRAKASH SHIVA ,  TROUNG NUGENT

CPC classification number: G03F7/7035 ,  G03F7/70383 ,  H01L51/0015 ,  H01L51/56

Abstract: In one embodiment, a method for creating a pattern in a layer of an organic electronic device that includes selectively irradiating a portion of the layer is provided, and devices and sub-assemblies made by the same.

Abstract translation: 在一个实施例中，提供了一种用于在包括选择性地照射该层的一部分的有机电子器件的层中产生图案的方法，以及由其制成的器件和子组件。

公开(公告)号：WO2006072024A2

公开(公告)日：2006-07-06

申请号：PCT/US2005/047519

申请日：2005-12-29

Applicant: E. I. DU PONT DE NEMOURS AND COMPANY ,  YU, Gang ,  PRAKASH, Shiva

Inventor： YU, Gang ,  PRAKASH, Shiva

IPC: H01L29/08

CPC classification number: H01L27/3276 ,  H01L2227/323

Abstract: An electronic device includes a substrate including a pixel driving circuit, a first conductive member, and a second conductive member. The first and second conductive members are spaced apart, the first conductive member is connected to the pixel driving circuit, and the second conductive member can be part of a power transmission line. The electronic device also includes an electronic component that includes a first electrode that contacts the first conductive member, a second electrode that is connected to but does not contact the second conductive member, and an organic layer lying between the first and second electrodes. The electronic device also includes a third conductive member that is connected to the second electrode and the second conductive member, and contacts the second conductive member. In one embodiment, a process for forming the electronic device uses the second electrode as a hardmask when removing portions of the first organic layer.

Abstract translation: 电子装置包括：基板，包括像素驱动电路，第一导电部件和第二导电部件。 第一和第二导电构件间隔开，第一导电构件连接到像素驱动电路，并且第二导电构件可以是电力传输线的一部分。 电子设备还包括电子部件，其包括接触第一导电部件的第一电极，与第二导电部件连接但不与第二导电部件接触的第二电极以及位于第一和第二电极之间的有机层。 电子设备还包括连接到第二电极和第二导电构件并与第二导电构件接触的第三导电构件。 在一个实施例中，当去除第一有机层的部分时，用于形成电子器件的工艺使用第二电极作为硬掩模。

公开(公告)号：WO2003077184A1

公开(公告)日：2003-09-18

申请号：PCT/US2003/007241

申请日：2003-03-07

Applicant: MENTOR GRAPHICS CORPORATION ,  PRAKASH, Shiva ,  BOWYER, Bryan, Darrell ,  GUTBERLET, Peter, Pius

Inventor： PRAKASH, Shiva ,  BOWYER, Bryan, Darrell ,  GUTBERLET, Peter, Pius

IPC: G06G7/62

CPC classification number: G06F17/5045 ,  Y10S707/99931

Abstract: A behavioral synthesis tool (14) for generating an integrated circuit design. The tool allows a designer to interactively (18) allocate variables or arrays to memory resources without having to modify a source code description (12) of the integrated circuit (12). The tool reads the source code description (12) and generates a synthesis intermediate format (16) stored in memory. The tool searches the in-memory synthesis format to find arrays for each process. The arrays are then listed in a GUI (18). The GUI allows the designer to create memory resources, specifying the type of memory and packing mode. The designer is also provided with the ability to vary the format among a plurality of formats used to pack arrays to memory during the memory packing process. Upon completion of modifying the memory allocation, the designer saves the changes and such changes are effectuated by automatically updating the synthesis intermediate format.

Abstract translation: 一种用于产生集成电路设计的行为综合工具（14）。 该工具允许设计者交互地（18）将变量或数组分配给存储器资源，而不必修改集成电路（12）的源代码描述（12）。 该工具读取源代码描述（12）并生成存储在存储器中的合成中间格式（16）。 该工具搜索内存中的合成格式，以查找每个进程的数组。 然后将数组列在GUI（18）中。 GUI允许设计人员创建内存资源，指定内存类型和打包模式。 在存储器打包过程中，设计者还具有在用于将阵列打包到存储器的多种格式之间改变格式的能力。 完成修改内存分配后，设计人员保存更改，并通过自动更新合成中间格式来实现这些更改。