公开(公告)号：WO2006014692A3

公开(公告)日：2006-03-16

申请号：PCT/US2005025671

申请日：2005-07-20

Applicant: UNIV COLUMBIA ,  STANIC NEBOJSA ,  TSIVIDIS YANNIS

Inventor： STANIC NEBOJSA ,  TSIVIDIS YANNIS

IPC: H03B5/12

CPC classification number: H03B5/1228 ,  H03B5/1212 ,  H03B5/124 ,  H03B2201/036

Abstract: An apparatus for optimizing a quality factor Q associated with an electrical resonator system includes an LC resonator and an optimizing circuit for providing a negative resistance. The optimizing circuit is electrically coupled to the resonator circuit, and includes two CMOS transistor pairs with the gates of the PMOS transistors cross-coupled with inputs to the resonator through capacitors, and the gates of the NMOS transistor cross-coupled with the inputs to the resonator through capacitors. The optimizing circuit receives at least one control voltage for varying the negative resistance by selectively biasing the PMOS transistors and NMOS transistors. The optimizing circuit also includes a current source for providing a controlled current to the CMOS transistor pairs. The current source is situated either between a supply voltage and the CMOS transistor pairs, or between the CMOS transistor pairs and a ground reference voltage. A current-control voltage controls the current flowing through the CMOS transistor pairs.

Abstract translation: 用于优化与电谐振器系统相关联的质量因数Q的装置包括LC谐振器和用于提供负电阻的优化电路。 优化电路电耦合到谐振器电路，并且包括两个CMOS晶体管对，其中PMOS晶体管对的栅极通过电容器与谐振器的输入交叉耦合，并且NMOS晶体管的栅极与输入交叉耦合到 谐振器通过电容器。 优化电路通过选择性地偏置PMOS晶体管和NMOS晶体管来接收用于改变负电阻的至少一个控制电压。 优化电路还包括用于向CMOS晶体管对提供受控电流的电流源。 电流源位于电源电压和CMOS晶体管对之间，或位于CMOS晶体管对与接地参考电压之间。 电流控制电压控制流过CMOS晶体管对的电流。

公开(公告)号：WO2006014692A2

公开(公告)日：2006-02-09

申请号：PCT/US2005/025671

申请日：2005-07-20

Applicant: THE TRUSTEES OF COLUMBIA UNIVERSITY IN THE CITY OFNEW YORK ,  STANIC, Nebojsa ,  TSIVIDIS, Yannis

Inventor： STANIC, Nebojsa ,  TSIVIDIS, Yannis

IPC: H03B5/12

CPC classification number: H03B5/1228 ,  H03B5/1212 ,  H03B5/124 ,  H03B2201/036

Abstract: An apparatus for optimizing a quality factor Q associated with an electrical resonator system includes an LC resonator and an optimizing circuit for providing a negative resistance. The optimizing circuit is electrically coupled to the resonator circuit, and includes two CMOS transistor pairs with the gates of the PMOS transistors cross-coupled with inputs to the resonator through capacitors, and the gates of the NMOS transistor cross-coupled with the inputs to the resonator through capacitors. The optimizing circuit receives at least one control voltage for varying the negative resistance by selectively biasing the PMOS transistors and NMOS transistors. The optimizing circuit also includes a current source for providing a controlled current to the CMOS transistor pairs. The current source is situated either between a supply voltage and the CMOS transistor pairs, or between the CMOS transistor pairs and a ground reference voltage. A current-control voltage controls the current flowing through the CMOS transistor pairs.

Abstract translation: 用于优化与电谐振器系统相关联的品质因数Q的装置包括LC谐振器和用于提供负电阻的优化电路。 优化电路电耦合到谐振器电路，并且包括两个CMOS晶体管对，其中PMOS晶体管的栅极通过电容器与到谐振器的输入交叉耦合，并且NMOS晶体管的栅极与输入到晶体管的输入端交叉耦合 谐振器通过电容。 优化电路通过选择性地偏置PMOS晶体管和NMOS晶体管来接收至少一个用于改变负电阻的控制电压。 优化电路还包括用于向CMOS晶体管对提供受控电流的电流源。 电流源位于电源电压和CMOS晶体管对之间，或CMOS晶体管对和地参考电压之间。 电流控制电压控制流经CMOS晶体管对的电流。