公开(公告)号：JP2007081370A

公开(公告)日：2007-03-29

申请号：JP2006166266

申请日：2006-06-15

Applicant: ▲イ▼統科技股▲分▼有限公司 ,  Silicon Integrated Systems Corp

Inventor： HSU CHIH-TAI ,  WU CHUNG-JU

IPC: H01L23/12

CPC classification number: H01L23/295 ,  H01L23/3128 ,  H01L23/49811 ,  H01L23/49822 ,  H01L23/49827 ,  H01L23/552 ,  H01L24/29 ,  H01L24/32 ,  H01L24/45 ,  H01L24/48 ,  H01L24/73 ,  H01L24/83 ,  H01L24/85 ,  H01L2224/27013 ,  H01L2224/2919 ,  H01L2224/32225 ,  H01L2224/43826 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/45565 ,  H01L2224/45686 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/73265 ,  H01L2224/83051 ,  H01L2224/83192 ,  H01L2224/8385 ,  H01L2224/85 ,  H01L2224/92 ,  H01L2224/92247 ,  H01L2924/01006 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01079 ,  H01L2924/014 ,  H01L2924/0665 ,  H01L2924/07802 ,  H01L2924/12041 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/16152 ,  H01L2924/181 ,  H01L2924/3025 ,  H01L2924/00014 ,  H01L2224/4569 ,  H01L2924/00012 ,  H01L2924/00 ,  H01L2924/00015

Abstract: PROBLEM TO BE SOLVED: To provide a packaging method which can prevent an electric interference without using electric shield wiring and effectively solve heavy density between respective gold wirings, difficulty of interconnect line, complication of a circuit pattern, and package difficulty.
SOLUTION: A package structure has a substrate 218, a chip 202, and a plurality of copper interconnect lines 204a. The substrate 218 has at least one conductive structure 209, and the copper interconnect line 204a has an insulating material on a front surface. The chip 202 is fixed on the substrate 218, and the conductive structure 209 is electrically connected with the chip 202 by the copper interconnect line 204 covered with the insulating material.
COPYRIGHT: (C)2007,JPO&INPIT

Abstract translation: 要解决的问题：提供一种能够防止电气干扰而不使用电屏蔽布线并且有效地解决各个金线之间的密集度，互连线难度，电路图案的复杂性和封装难度的封装方法。 解决方案：封装结构具有基板218，芯片202和多个铜互连线204a。 基板218具有至少一个导电结构209，并且铜互连线204a在前表面上具有绝缘材料。 芯片202固定在基板218上，并且导电结构209通过被绝缘材料覆盖的铜互连线204与芯片202电连接。 版权所有（C）2007，JPO＆INPIT

公开(公告)号：JP2006261622A

公开(公告)日：2006-09-28

申请号：JP2005150652

申请日：2005-05-24

Applicant: ▲しい▼統科技股▲ふん▼有限公司 ,  Silicon Integrated Systems Corp

Inventor： LIANG KUEI-CHEN ,  WU CHUNG-JU ,  FANG CHUNG-YIN

IPC: H01L23/00 ,  H01L21/60 ,  H01L23/29 ,  H01L23/31

CPC classification number: H01L24/45 ,  H01L23/3128 ,  H01L23/50 ,  H01L23/552 ,  H01L23/60 ,  H01L24/29 ,  H01L24/32 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L24/83 ,  H01L2223/6611 ,  H01L2224/05554 ,  H01L2224/27013 ,  H01L2224/2919 ,  H01L2224/32225 ,  H01L2224/45144 ,  H01L2224/4554 ,  H01L2224/45565 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48237 ,  H01L2224/49175 ,  H01L2224/73265 ,  H01L2224/83051 ,  H01L2224/83192 ,  H01L2224/8385 ,  H01L2224/8592 ,  H01L2224/92 ,  H01L2224/92247 ,  H01L2924/00011 ,  H01L2924/00014 ,  H01L2924/01006 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/0665 ,  H01L2924/07802 ,  H01L2924/0781 ,  H01L2924/10161 ,  H01L2924/14 ,  H01L2924/15153 ,  H01L2924/1517 ,  H01L2924/15311 ,  H01L2924/16152 ,  H01L2924/181 ,  H01L2924/1815 ,  H01L2924/3025 ,  H01L2924/3511 ,  H01L2924/00012 ,  H01L2924/00 ,  H01L2224/43

Abstract: PROBLEM TO BE SOLVED: To provide an integrated circuit package structure and its packaging method.
SOLUTION: The integrated circuit package structure is provided with a substrate 218, a chip 202, and a plurality of connection wires and conductive filling materials 222. The substrate is provided with at least one conductive structure 208. There is an insulating material on the surface of the connection wire. The chip is fixed on the substrate. The connection wire is electrically connected to the chip and the conductive structure. The conductive filling materials are fixed among a plurality of the connection wires. The packaging method for the integrated circuit comprises steps for fixing the chip on the substrate, for connecting the chip and the conductive structure through the connection wire, and forming the conductive filling materials among the connection wire.
COPYRIGHT: (C)2006,JPO&NCIPI

Abstract translation: 要解决的问题：提供集成电路封装结构及其封装方法。 解决方案：集成电路封装结构设置有基板218，芯片202，以及多个连接布线和导电填充材料222.基板设置有至少一个导电结构208.存在绝缘材料 在连接线的表面。 芯片固定在基板上。 连接线电连接到芯片和导电结构。 导电填充材料固定在多根连接线之间。 集成电路的封装方法包括将芯片固定在基板上的步骤，用于通过连接线连接芯片和导电结构，并在连接线之间形成导电填充材料。 版权所有（C）2006，JPO＆NCIPI

公开(公告)号：US11914799B2

公开(公告)日：2024-02-27

申请号：US17930249

申请日：2022-09-07

Applicant: Silicon Integrated Systems Corp.

Inventor： Min-han Lee

IPC: G06F3/0354 ,  G06F3/038 ,  G06F3/041 ,  H04M1/72412

CPC classification number: G06F3/03545 ,  G06F3/038 ,  G06F3/04162 ,  H04M1/72412 ,  G06F2203/04101 ,  H04M2201/40

Abstract: An interactive control system includes: an active pen; and an electronic device configured to wirelessly control the active pen, receive a user command, and generate a control command according to the user command, wherein at least one of the active pen and the electronic device is configured to execute a control function according to the control command.

公开(公告)号：US11847269B2

公开(公告)日：2023-12-19

申请号：US18075137

申请日：2022-12-05

Applicant: Silicon Integrated Systems Corp.

Inventor： Min-han Lee

IPC: G06F3/0354

CPC classification number: G06F3/03545 ,  G06F3/03547

Abstract: A stylus and a touch interactive device is provided. The stylus includes a pen holder, a cover plate, and a circuit control assembly. The pen holder includes a pen head, a pen wall, and an accommodating space. A groove is defined in the pen wall and communicates with the accommodating space. The pen head is arranged at one end of the pen holder. The cover plate is arranged corresponding to the groove and covers the groove. The circuit control assembly is received in the accommodating space. The circuit control assembly includes a mainboard and a touch sensing module connected to the mainboard. The touch sensing module is attached to the pen wall or a first inner wall of the cover plate to form a touch sensing area. The touch sensing module is used to receive and sense at least one touch command of fingers in the touch sensing area.

公开(公告)号：US20220179521A1

公开(公告)日：2022-06-09

申请号：US17537536

申请日：2021-11-30

Applicant: Silicon Integrated Systems Corp.

Inventor： Yi-Feng CHIANG ,  Cheng-Yi HUANG

IPC: G06F3/044

Abstract: The present invention discloses a noise reduction touch light adjustment device including a light adjustment film, a capacitive touch panel, a noise reduction film, a glass substrate, a control circuit module, and an alternating current (AC) transformer. The noise reduction film is disposed between the light adjustment film and the capacitive touch panel to lower noise inputted from the AC transformer into the light adjustment film such that the capacitive touch panel is ensured to be operated precisely.

公开(公告)号：US20210173526A1

公开(公告)日：2021-06-10

申请号：US17107291

申请日：2020-11-30

Applicant: SILICON INTEGRATED SYSTEMS CORP.

Inventor： Wei-En SHIH ,  Ying-Jyh YEH ,  Yi-Chun CHEN

IPC: G06F3/044

Abstract: A touch electrode structure and a capacitive touch system are provided. The touch electrode structure includes: a substrate; a plurality of first electrode series each including a plurality of first electrodes; a plurality of second electrode series each including a plurality of second electrodes; and at least one connecting wire. Each of the second electrode series includes at least one electrode group, and the at least one electrode group includes two of the second electrodes. The two of the second electrodes are electrically connected to each other on a first surface of the substrate, and at least one of the two of the second electrodes is electrically connected to one of the second electrodes adjacent to the at least one of the two of the second electrodes.

公开(公告)号：US10819300B2

公开(公告)日：2020-10-27

申请号：US16393363

申请日：2019-04-24

Applicant: Silicon Integrated Systems Corp

Inventor： Wen-Chi Lin ,  Ssu-Che Yang ,  Keng-Nan Chen

IPC: H03G3/30 ,  H03F3/45 ,  H04R3/00

Abstract: An analog microphone and a control method thereof are disclosed. The analog microphone includes a sensor configured to sense an audio signal and convert the audio signal into an electrical signal; a charge pump configured to provide a bias voltage for the sensor to drive the sensor; a source follower configured to receive the electrical signal and convert the electrical signal into a source follower signal; a gain adjustable amplifier configured to receive the source follower signal, multiply the source follower signal by an amplifying factor, and output an amplified signal; and a detecting module configured to adaptively control the bias voltage of the charge pump and the amplified signal of the gain adjustable amplifier in response to the source follower signal of the source follower.

公开(公告)号：US20200042113A1

公开(公告)日：2020-02-06

申请号：US16531067

申请日：2019-08-04

Applicant: Silicon Integrated Systems Corp.

Inventor： Han-ning Chen

IPC: G06F3/0354 ,  G06F3/044 ,  G06F3/038

Abstract: A bidirectional active stylus and a sensing system are provided. The stylus includes a receiving electrode, a first emitting diode and a second emitting diode. The receiving electrode is configured to receive a synchronous signal from a touch pad. The receiving electrode is disposed at a position closer to the touch pad with respect to the first emitting diode and the second emitting diode. The strength of received signals is improved.

公开(公告)号：US10345157B2

公开(公告)日：2019-07-09

申请号：US14254683

申请日：2014-04-16

Applicant: Silicon Integrated Systems Corp.

Inventor： Song-Sheng Lin

IPC: G01K7/01 ,  H03K3/03 ,  H03K3/0231

Abstract: An on-chip temperature sensing device is disclosed. The disclosed on-chip temperature sensing device is capable of sensing an environmental temperature of the chip. The device comprises a reference generating circuit, a first oscillator, a second oscillator, and an arithmetic logic unit. The reference generating circuit is configured to generate a first control voltage to control the first oscillator and the second oscillator. The bias current of the first oscillator and the bias current of the second oscillator are both controlled by the first control voltage so that the bias current of the first oscillator is directly proportional the bias current of the second oscillator regardless the environmental temperature. The first oscillator generates a first oscillation signal, while the second oscillator generates a second oscillation signal. The arithmetic logic unit may calculate the environmental temperature according to the first oscillation signal and the second oscillation signal.

公开(公告)号：US20160124482A1

公开(公告)日：2016-05-05

申请号：US14930846

申请日：2015-11-03

Applicant: Silicon Integrated Systems Corp.

Inventor： Mu-Tsan YU ,  Min-Yan CIOU ,  Ying-Jyh YEH

IPC: G06F1/32

CPC classification number: G06F1/3203 ,  G06F1/3206 ,  G06F1/3243 ,  Y02D10/152

Abstract: A power management apparatus and a power management method are provided. The method includes the following steps. Conduct a first current path during a first period. Provide a first voltage to an operation end when the first current path conducts and a microprocessor is disabled. The first voltage is used to selectively conduct a second path during the first period. Provide a second voltage to the microprocessor when the second current path conducts. The second voltage is used to turn on the microprocessor. Provide a third voltage to the operation end by the microprocessor when the microprocessor is turned on. The third voltage is used to keep the second current path conducted.

Abstract translation: 提供电源管理装置和电源管理方法。 该方法包括以下步骤。 在第一个时期内进行第一个当前路径。 当第一电流路径导通并且微处理器被禁用时，向操作端提供第一电压。 第一电压用于在第一周期期间选择性地导通第二路径。 当第二个电流通路导通时，向微处理器提供第二个电压。 第二个电压用于打开微处理器。 当微处理器打开时，微处理器向操作端提供第三个电压。 第三电压用于保持第二电流通路的导通。