Abstract:
PROBLEM TO BE SOLVED: To provide a coreless packaging substrate and a method for manufacturing the same. SOLUTION: The built-up structure has a first outside and an opposite second outside, and includes one or more second dielectric layers 261 and second wiring layers 262, and a plurality of conductive vias 263. The second dielectric layers 261 have first and second surfaces respectively facing the first and second outsides. The second wiring layers 262 are disposed on the second surface. The conductive vias 263 are disposed in the second dielectric layer 261. The outermost second wiring layer 262 at the second outside has a plurality of second conductive pads. The first wiring layer 25 is embedded into and exposed from the first surface of the outermost second dielectric layer 261 at the first outside, and has a plurality of first conductive pads. The conductive vias 263 electrically connect the first wiring layer 25 and the second wiring layer 262. COPYRIGHT: (C)2011,JPO&INPIT
Abstract:
PROBLEM TO BE SOLVED: To provide a method for fabricating a double-sided or multi-layer printed circuit board (PCB) by ink-jet printing so as to reduce a fabrication cost and to satisfy various requests on the market. SOLUTION: The method for fabricating a double-sided or multi-layer printed circuit board (PCB) by ink-jet printing that includes providing a substrate 100, forming a first self-assembly membrane (SAM) 103 on at least one side of the substrate, forming a non-adhesive membrane 105 on the first SAM 103, forming at least one microhole 107 in the substrate, forming a second SAM 103 on a surface of the microhole, providing catalyst particles on the at least one side of the substrate and on the surface of the microhole, and forming a catalyst circuit pattern 110 on the substrate. COPYRIGHT: (C)2007,JPO&INPIT
Abstract:
A lid for a MEMS device and the relative manufacturing method. The lid includes: a first board (20) with opposite first and second surfaces (20a, 20b) having first and second metal layers (21a, 21b) disposed thereon, respectively, wherein a through cavity (200) extends through the first board and the first and second metal layers; a second board (23) with opposite third and fourth surfaces (23a, 23b); an adhesive layer (22) sandwiched between the second surface of the first board and the third surface of the second board to couple the first and second boards together such that the through cavity is closed by the second board, thereby forming a recess (200); and a first conductor layer (25a) coating the bottom and the side surfaces (201a, 201b) of the recess. The lid enhances the shielding effect upon the MEMS device.
Abstract:
PROBLEM TO BE SOLVED: To provide a package substrate which allows for simplification of process while eliminating waste of resources, and to provide a manufacturing method therefor, and a base material thereof.SOLUTION: In the manufacturing method for a package substrate, two metal layers are laminated each other, at first, and covered with a dielectric layer. Subsequently, build-up structures are formed on both sides of the dielectric layer, and the build-up structures on both sides are finally separated along the interface of two metal layers, thus forming two package substrates. Since two metal layers, i.e., an intermediate layer, are not separated, at first, in the formation process of a built-up structure because of the adhesive characteristics of the dielectric layer, but two metal layers are separated smoothly, in the end, by cutting the dielectric layer portion around the two metal layers, the process can be simplified. Furthermore, resources are not wasted because a circuit layer, a metal bump or a support structure can be formed by patterning the two metal layers, i.e., an intermediate layer.
Abstract:
PROBLEM TO BE SOLVED: To provide a circuit substrate with a cavity.SOLUTION: The circuit substrate includes a first core layer 210, a second core layer 220, and a central dielectric layer 230. The first core layer includes a core dielectric layer 212 and a core circuit layer 214, and the core circuit layer is arranged on the core dielectric layer. The second core layer is arranged on the first core layer. The central dielectric layer is arranged between the first core layer and the second core layer. A cavity R penetrates through the second core layer and the central dielectric layer, and one part of the core circuit layer is exposed.
Abstract:
A method for fabricating a double-sided or multi-layer printed circuit board (PCB) by ink jet printing that includes providing a substrate, forming a first self-assembly membrane (SAM) on at least one side of the substrate, forming a non-adhesive membrane on the first SAM, forming at least one microhole in the substrate, forming a second SAM on a surface of the microhole, providing catalyst particles on the at least one side of the substrate and on the surface of the microhole, and forming a catalyst circuit pattern on the substrate.