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公开(公告)号：KR100957224B1
公开(公告)日：2010-05-11
申请号：KR1020080055188
申请日：2008-06-12
Applicant: (주)명정보기술
Abstract: 본 발명은 솔리드 스테이트 디스크(SSD)에서 다중 채널을 이용한 플래시 메모리의 제어방법 및 제어시스템에 관한 것으로, 특히 플래시 메모리의 인식 및 용량을 확인할 수 있는 다중 채널을 이용한 플래시 메모리의 제어방법 및 제어시스템에 관한 것이다.
본 발명은 플래시 메모리 제어 시스템을 구성함에 있어서 다중 채널을 이용함으로써 고속으로 데이터를 처리할 수 있으며, 또한 장착된 플래시 메모리의 수에 상관없이 탄력적으로 플래시 메모리를 제어할 수 있는 다중 데이터 채널을 이용한 플래시 메모리 제어방법 및 제어시스템을 제공한다.-
公开(公告)号：KR100933788B1
公开(公告)日：2009-12-24
申请号：KR1020090063556
申请日：2009-07-13
Applicant: (주)명정보기술
CPC classification number: G06F21/10 , G06F9/445 , G06F21/64 , G11B20/00246 , G11B20/00253 , G11B20/00818 , G11B2220/2516
Abstract: PURPOSE: A command and data processing method of a write block device for hard disk forensics is provided to cut off command and data processing when any change occurs during digital forensics due to development and change of ATA related technology. CONSTITUTION: A command and data processing method of a write block device for hard disk forensics comprises the steps of: waiting for receiving commands transmitted from a host computer(S101), receiving commands transmitted from a host computer(S102), classifying the commands into six groups of read, information, transmission, write, protection and undefined, determining the received commands and moving them to processors for processing each command and data(S103), and completing the command and data processing(S110), and returning to the waiting step. The commands are ones used in the ATA (Advanced Technology Attachment) standard.
Abstract translation: 目的：提供用于硬盘取证的写入块设备的命令和数据处理方法，用于在由于ATA相关技术的开发和更改而在数字取证期间发生任何变化时切断命令和数据处理。 构成：用于硬盘取证的写入块装置的命令和数据处理方法包括以下步骤：等待从主计算机发送的命令（S101），接收从主计算机发送的命令（S102），将命令分类为 六组读取，信息，传输，写入，保护和未定义，确定接收到的命令并将其移动到处理器以处理每个命令和数据（S103），并完成命令和数据处理（S110），并返回等待 步。 这些命令是ATA（Advanced Technology Attachment）标准中使用的命令。
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公开(公告)号：KR1020090129096A
公开(公告)日：2009-12-16
申请号：KR1020080055194
申请日：2008-06-12
Applicant: (주)명정보기술
Abstract: PURPOSE: A data management system of a single flash memory is provided to management each plan independently by forming a vendor region in the plan. CONSTITUTION: A flash memory comprises four plans(11a-11b) and each plan includes a block. The block includes a memory information region for storing a logical/physical address of the flash memory, a vendor region comprising a reserved region, and a data region performing data operation. The logical address according to the physical address is independently managed for each plan by the vendor region of each plan.
Abstract translation: 目的：提供单个闪存的数据管理系统，通过在计划中形成供应商区域来独立管理每个计划。 构成：闪存包括四个计划（11a-11b），每个计划包括一个块。 该块包括用于存储闪存的逻辑/物理地址的存储器信息区域，包括保留区域的供应商区域和执行数据操作的数据区域。 根据物理地址的逻辑地址由每个计划的供应商区域为每个计划独立管理。
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Patent Agency Ranking
公开(公告)号：KR1020090129093A
公开(公告)日：2009-12-16
申请号：KR1020080055188
申请日：2008-06-12
Applicant: (주)명정보기술
Abstract: PURPOSE: A flash memory control method using a multi-data channel in an SSD(Solid State Disk) and a control system thereof are provided to process data at high speed by using a multi-channel. CONSTITUTION: A CES(Chip Enable Signal) of a first data channel is activated and an ID value of a memory is read(S2). Capacity and structure of the memory is checked according to an ID value of the read memory(S3). The CES is deactivated and the ID value of the memory is read by activating the CES of the first data channel(S4). The capacity and the structure of the memory are checked according to the ID value of the memory. If the read value is '00' or 'FF', the CES of a second data channel is activated by deciding that the memory is absent(S7,S9). The ID value of the memory is read by activating the CES of an 'n'th data channel after previous steps are repeated until the 'n'th data channel. If the read value is '00' or 'FF', processing is terminated(S10).
Abstract translation: 目的：提供使用SSD（固态磁盘）中的多数据通道及其控制系统的闪速存储器控制方法，以通过使用多通道来高速处理数据。 构成：激活第一数据通道的CES（芯片使能信号），并读取存储器的ID值（S2）。 根据读取的存储器的ID值检查存储器的容量和结构（S3）。 CES被禁用，并通过激活第一数据信道的CES来读取存储器的ID值（S4）。 根据存储器的ID值检查存储器的容量和结构。 如果读取值为“00”或“FF”，则通过判断存储器不存在来激活第二数据通道的CES（S7，S9）。 通过重复先前的步骤直到第n个数据通道来激活第n个数据通道的CES来读取存储器的ID值。 如果读取值为“00”或“FF”，则处理结束（S10）。
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公开(公告)号：KR100933787B1
公开(公告)日：2009-12-24
申请号：KR1020090063530
申请日：2009-07-13
Applicant: (주)명정보기술
CPC classification number: G06F21/10 , G06F9/445 , G06F21/64 , G11B20/00246 , G11B20/00253 , G11B20/00818 , G11B2220/2516
Abstract: PURPOSE: A write block device for hard disk forensics is provided to minimize heat generation of a hard disk and thus to prevent thermal damage of the hard disk even in a long time work. CONSTITUTION: A write block device for hard disk forensics comprises an ATA interface unit(11), a USB interface unit(12), a display unit, a power port(16), a current limit circuit, a mount(19), a cooler(18), and a controller. The ATA interface unit and the USB interface unit are used for communications with a host computer. The display unit shows the various operation states of the write block device and a hard disk. The power port supplies power to the hard disk. The current limit circuit prevents over current from flowing from the power port to the hard disk. The mount loads the hard disk. The cooler cools the heat generated in the hard disk during operation. The controller processes the various kinds of control signals and data transmitted from the host computer.
Abstract translation: 目的：提供用于硬盘取证的写入块设备，以尽量减少硬盘的发热，从而即使在长时间的工作中也能防止硬盘的热损坏。 构成：用于硬盘取证的写入块装置包括ATA接口单元（11），USB接口单元（12），显示单元，电源端口（16），限流电路，安装座（19）， 冷却器（18）和控制器。 ATA接口单元和USB接口单元用于与主机通信。 显示单元显示写入块装置和硬盘的各种操作状态。 电源端口为硬盘供电。 电流限制电路可防止过电流从电源端口流向硬盘。 安装装载硬盘。 冷却器在运行期间冷却硬盘中产生的热量。 控制器处理从主机传送的各种控制信号和数据。
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公开(公告)号：KR1020090129104A
公开(公告)日：2009-12-16
申请号：KR1020080055203
申请日：2008-06-12
Applicant: (주)명정보기술
IPC: G06F12/00
Abstract: PURPOSE: A file system for storing data of a multi-flash memory is provided to independently management each plan by forming a vendor region in each plan. CONSTITUTION: An interface(11) is connected to an external host and a flash memory unit(13) comprises four plans. A controller(12) is connected to the interface and controls operation of the flash memory unit through a data bus by a control command of the external host. An address management system is successively increased according to the data bus. Each plan includes a memory information region for storing a logical/physical address of the flash memory, a vendor region comprising a reserved region, and a data region performing data operation.
Abstract translation: 目的：提供用于存储多闪存存储器的数据的文件系统，以通过在每个计划中形成供应商区域来独立地管理每个计划。 构成：接口（11）连接到外部主机，闪存单元（13）包括四个计划。 控制器（12）连接到接口，并通过外部主机的控制命令通过数据总线控制闪存单元的操作。 地址管理系统根据数据总线连续增加。 每个方案包括用于存储闪速存储器的逻辑/物理地址的存储器信息区域，包括保留区域的供应商区域和执行数据操作的数据区域。
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公开(公告)号：KR100982440B1
公开(公告)日：2010-09-15
申请号：KR1020080055194
申请日：2008-06-12
Applicant: (주)명정보기술
Abstract: 본 발명에 따른 단일 플래시 메모리의 데이터 관리시스템에 있어서, 플래시 메모리는, 4개의 플랜과, 각 플랜은 플래시 메모리의 논리적인 주소와 물리적인 주소에 대한 정보가 저장된 메모리정보영역과 예비영역으로 구성된 벤더영역과, 데이터를 저장하는 데이터영역을 형성하는 블록을 포함하여 구성되며, 각 플랜의 벤더영역에 의해 물리적인 주소에 따른 논리적인 주소는 각각의 플랜에 대하여 독립적으로 관리되는 것을 특징으로 한다.
또한, 플래시 메모리의 데이터 영역 또는 메모리정보영역에 배드 블록(bad block)이 발생하면, 배드 블록에 위치한 데이터가 예비영역으로 이동하고, 이동한 데이터의 관련정보는 메모리정보영역에 변경되어 기록되는 것을 특징으로 한다.-
公开(公告)号：KR1020090129095A
公开(公告)日：2009-12-16
申请号：KR1020080055193
申请日：2008-06-12
Applicant: (주)명정보기술
Abstract: PURPOSE: A high-speed data processing system using a double buffer is provided to efficiently perform read/write operations for high-capacity data by using the double buffer. CONSTITUTION: An interface(11) is connected to an external host and a controller(12) is connected to the interface. The controller controls data read/write operation of a flash memory unit(15) by a control command of the external host. A first/second buffer(13) temporarily store data to be written to the flash memory unit or temporarily stores the data to be read from the flash memory through the interface.
Abstract translation: 目的：提供使用双缓冲器的高速数据处理系统，通过使用双缓冲器来高效执行高容量数据的读/写操作。 构成：接口（11）连接到外部主机，控制器（12）连接到接口。 控制器通过外部主机的控制命令控制闪存单元（15）的数据读/写操作。 第一/第二缓冲器（13）临时存储要写入闪存单元的数据，或通过接口临时存储要从闪存读取的数据。
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