公开(公告)号：KR1020040026987A

公开(公告)日：2004-04-01

申请号：KR1020020058664

申请日：2002-09-27

Applicant: (주)텔레필드

Inventor： 노병진 ,  신동우

IPC: H04B10/00

CPC classification number: H04J3/0623

Abstract: PURPOSE: A TU signal pointer processing apparatus and a method therefor are provided to reduce the capacity of a logical circuit by performing a time-division processing and installing a state storing unit and reduce a unit cost by manufacturing the logical circuit as an ASIC. CONSTITUTION: A clock generator(660) generates write, read, process clocks, and address and system clocks for storing and reading position information and valid information among received AU-3 signals. A reception state storing unit(670) stores a current reception state of every sequential logical circuit of a receiving signal pointer processor(630) for every time slot of an AU-3 signal received on the basis of read, process and write timing that have been generated by the clock generator. A transmission state storing unit(680) stores a current transmission state of every sequential logical circuit of a transmission signal pointer processor(650) for every time slot of a received AU-3 signal. The receiving signal pointer processor(530) performs a pointer process function, generates position information of V5 byte, and stores the current reception state of the sequential logical circuit in the reception state storing unit(670). An elastic buffer(640) temporarily stores valid information among the AU-3 signals and stores the position information. The transmission signal pointer processor(650) generates a point signal value to be outputted, multiplexes it with a valid information signal to generate a re-aligned AU-3 signal, and stores the current transmission state of the sequential logical circuit in the transmission state storing unit(680).

Abstract translation: 目的：提供一种TU信号指针处理装置及其方法，通过执行时分处理和安装状态存储单元来降低逻辑电路的容量，并通过制造作为ASIC的逻辑电路来降低单位成本。 构成：时钟发生器（660）产生写入，读取，处理时钟，以及用于存储和读取接收的AU-3信号之间的位置信息和有效信息的地址和系统时钟。 接收状态存储单元（670）存储接收信号指针处理器（630）的每个顺序逻辑电路的当前接收状态，用于根据读取，处理和写入定时接收的AU-3信号的每个时隙， 由时钟发生器产生。 传输状态存储单元（680）针对接收的AU-3信号的每个时隙存储发送信号指针处理器（650）的每个顺序逻辑电路的当前传输状态。 接收信号指针处理器（530）执行指针处理功能，生成V5字节的位置信息，并将顺序逻辑电路的当前接收状态存储在接收状态存储部（670）中。 弹性缓冲器（640）在AU-3信号之间临时存储有效信息并存储位置信息。 发送信号指针处理器（650）生成要输出的点信号值，将其与有效信息信号进行复用，生成再对齐的AU-3信号，将顺序逻辑电路的当前发送状态存储在发送状态 存储单元（680）。